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PDF F1Q28 Data sheet ( Hoja de datos )
| Número de pieza | F1Q28 | |
| Descripción | Bluetooth V4.0 module | |
| Fabricantes | F1 media | |
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F1Q28
Datasheet
Confidential / Preliminary Documentation
Revision 1.0
www.f1-media.com
1 page  
1.5 Device Terminal Descriptions
PCM/SPI
UART
USB
PIO
PCM2
Other Pins
PIN
PCM OUT/SPI MISO
PCM IN/SPI MOSI
PCM CLK/SPI CLK
PCM SYNC/SPI CSB
TXD
RXD
CTS
RTS
USB -
USB +
PIO0
PIO1
PIO2
PIO3
PIO4
PIO5
PCM2 OUT
PCM2 IN
PCM2 CLK
PCM2 Sync
ANT
GND
VDD_USB
VDD_3V3
VDD_PADS
VDD_1V8
VREG_EN
VREG_OUT
SPI/PCM#
USB/UART#
RESETB
X-Tal_IN
X-Tal_OUT
WP
Name
3
9
8
7
19
20
24
21
22
23
2
34
33
35
32
27
31
30
28
29
5
4,6,12
17
13
1
14
15
16
26
25
18
11
10
36
Description
PCM1 Synchronous data output / SPI data output
PCM1 Synchronous data input / SPI data input
PCM1 Synchronous data clock / SPI clock
PCM1 Synchronous data sync / SPI chip select, active low
UART data output, active low
UART data input, active high
UART clear to send, active low
UART request to send, active low
USB -
USB + with selectable internal 1.5k pull-up resistor
Programmable input/output line
PIO 3,4 Can be used to form I2C interface
PCM2 Serial Peripheral Interface data input
PCM2 Serial Peripheral Interface clock
PCM2 Serial Peripheral Interface data output
PCM2 Chip Select for Synchronous SPI active low
RF Connection to Antenna
Ground
Input to USB Regulator. Connect to external USB bus supply.
D.C input voltage for operation (3.0~3.3V)
Positive supply for digital input/output pads.
Output from internal high-voltage to 1.8V regulator.
Take high to enable internal regulator.
Output to USB regulator. (Output VDD_3V3)
High : SPI Mode , Low : PCM(PIO) Mode
High : USB Mode , Low : UART Mode
Reset if low.
External Clock In(Option). Typical NC
External Clock Out(Option). Typical NC
Internal EEPROM Write Protect.(High : Protection)
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5 Page 
3.3 I²C
EEPROM operation is not applicable to parts in UART mode.
F1Q28 Bluetooth Module uses an Internal I²C EEPROM to store device specific configuration information
(PS-Keys) such as Bluetooth address and USB descriptors.
Internal 16Kb EEPROM.( Option )
EEPROM I²C Interface
EEPROM
F1Q28
SCL PIO[3]
SDA
PIO[4]
WP WP
Description
I²C Clock
I²C Data
Write protect. Not driven by the CSR 8310 QFN.
The Line the EEPROM WP Line active on PCB.
The I²C standard timing recommendations must be followed as regards correct pull-up and I²C bus data-line
capacitance limits. By default, the EEPROM is accessed at I²C standard (100kHz or below) rate, and switchable to fast 400kHz mode by
PS Key if the EEPROM supports fast I²C.
CSR recommends 400kHz capable EEPROM in these applications to ensure the USB bus power mode boot timing specifications are
met.
As an alternative the PS Keys are downloadable from the USB host.
This requires a 26MHz crystal operation, which enables the USB host interface to function using the default PS Key configuration.
The host must then supply all required PS Key information.
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| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet F1Q28.PDF ] | |
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