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PDF FSEM311Z Data sheet ( Hoja de datos )

Número de pieza FSEM311Z
Descripción Green Mode Fairchild Power Switch
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FSEM311Z Hoja de datos, Descripción, Manual

January 2009
FSEM311, FSEM311Z
Green Mode Fairchild Power Switch (FPS™)
Features
ƒ Internal Avalanche Rugged Sense FET
ƒ Precision Fixed Operating Frequency
ƒ Internal Start-up Circuit
ƒ Pulse-by-Pulse Current Limiting
ƒ Over Voltage Protection (OVP)
ƒ Over Load Protection (OLP)
ƒ Internal Thermal Shutdown Function (TSD)
ƒ Auto-Restart Mode
ƒ Under Voltage Lockout (UVLO)
ƒ Low Operating Current (3mA)
ƒ Adjustable Peak Current Limit
ƒ Built-in Soft Start
Applications
ƒ SMPS for STB, DVD & DVCD Player
ƒ SMPS for Auxiliary Power
Description
The FSEM311 family of integrated Pulse Width
Modulator (PWM) and Sense FET are specifically
designed for high performance offline Switch Mode
Power Supplies (SMPS) with minimal external
components. All Ex series devices are integrated high
voltage power switching regulators which combine an
avalanche rugged Sense FET with a current mode PWM
control block. The integrated PWM controller features
include: Under Voltage Lock Out (UVLO) protection,
Leading Edge Blanking (LEB), an optimized gate turn-
on/turn-off driver, Thermal Shut Down (TSD) protection
and temperature compensated precision current
sources for loop compensation and fault protection
circuitry. When start up the FSEM311 offers good soft
start performance. When compared to a discrete
MOSFET and controller or RCC switching converter
solution, the FSEM311 family devices reduce total
component count, design size, weight while increasing
efficiency, productivity, and system reliability. Both
devices provide a basic platform that is well suited for
the design of cost-effective flyback converters.
Related Resources
ƒ AN-4137, AN-4141, AN-4147, AN-4150 (Flyback)
Ordering Information
Part
Number
FSEM311
FSEM311Z
Maximum Output Power Table(1)
Oper.
Temp.
Top
Mark
Eco
Stat
us
PKG
Packing
Method
230VAC ±
BVDSS Current RDS(ON) 15%(2)
Limit ,MAX
Open
Frame(3)
85 ~
265VAC
Open
Frame(3)
-25 ~ 85°C EM311 RoHS 8-DIP
-25 ~ 85°C EM311Z RoHS 8-DIP
Rail
Rail
650V
700V
0.58A
0.58A
19
19
13W
13W
8W
8W
For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
Notes:
1. The junction temperature can limit the maximum output power.
2. 230VAC or 100/115VAC with doubler. The maximum power with CCM operation.
3. Maximum practical continuous power in an open-frame design at 50°C ambient.
© 2008 Fairchild Semiconductor Corporation
FSEM311 • Rev. 1.0.0
www.fairchildsemi.com

1 page




FSEM311Z pdf
Electrical Characteristics
TA = 25°C unless otherwise specified
Symbol
Parameter
Conditions
Min. Typ. Max. Units
Sense FET Section
BVDSS
Drain Source
FSEM311
Breakdown Voltage FSEM311Z
IDSS Zero Gate Voltage Drain Current
RDS(ON) Drain-Source On-State Resistance(12)
CSS Input Capacitance
COSS Output Capacitance
CRSS Reverse Transfer Capacitance
td(ON) Turn-On Delay Time
tr Rise Time
td(off) Turn-Off Delay Time
tf Fall Time
Control Section
VCC = 0V, ID = 100µA
VDS = 650V, VGS = 0V
VDS = 650V, VGS = 0V, TC = 125°C
VGS = 10V, VGS = 0V, TC = 125°C
VGS = 0V, VDS = 25V, f = 1MHz
VGS = 0V, VDS = 25V, f = 1MHz
VGS = 0V, VDS = 25V, f = 1MHz
VDD = 350V, ID = 25mA
VDD = 350V, ID = 25mA
VDD = 350V, ID = 25mA
VDD = 350V, ID = 25mA
650
700
14.0
162
18
3.8
9.5
19
33.0
42
50
200
19.0
V
µA
µA
pF
pF
pF
nS
nS
nS
nS
fOSC
fOSC
Switching Frequency
Switching Frequency Variation(13)
DMAX Maximum Duty Cycle
DMIN Minimum Duty Cycle
VSTART
VSTOP
UVLO Threshold Voltage
IFB Feedback Source Current
tS/S Internal Soft Start Time
Burst Mode Section
VDS = 650V, VGS = 0V
-25°C < TJ < 85°C
VFB = 4V
VFB = 0V
After turn on
VFB = 0V
VFB = 4V
61 67 73 KHz
±5 ±10 %
71 77 83
%
000%
11 12 13
V
789 V
700 900 1100 µA
10 15 20 ms
VBURH Burst-Mode High Threshold Voltage
VBURL Burst-Mode Low Threshold Voltage
Protection Section
0.4 0.5 0.6
0.25 0.35 0.45
V
ILIM
tCLD
VSD
IDELAY
tLEB
VOVP
TSD
Peak Current Limit
Current Limit Delay Time(13)
Shutdown Feedback Voltage
Shutdown Delay Current
Leading-Edge Blanking Time(13)
Over Voltage Protection
Thermal Shutdown Temperature(13)
TJ = 25°C, di/dt = 90mA/µsec
VFB = 4V
0.51 0.58 0.65
200
5.5 6.0 6.5
3.5 5.0 6.5
200
18 19
-
125 140 155
A
ns
V
µA
ns
V
°C
Total Device Section
IOP
Operating Supply Current
(Control Part Only)
VCC = 14V
ICH Start-up Charging Current
VCC = 0V
VSTR Minimum VSTR Supply Voltage
VCC = 0V
Notes:
12. Pulse test: Pulse width=300ms, duty=2%
13. Though guaranteed, it is not 100% tested in the mass production.
135
0.70 0.85 1.00
35 - -`
mA
mA
V
© 2008 Fairchild Semiconductor Corporation
FSEM311 • Rev. 1.0.0
5
www.fairchildsemi.com

5 Page





FSEM311Z arduino
Applications Information
1. About Audible Noise
Switching mode power converters have electronic and
magnetic components, which generate audible noises
when the operating frequency is in the range of
20~20,000 Hz. Even though they operate above 20 kHz,
they can make noise depending on the load condition.
Designers can employ several methods to reduce these
noises. Here are three of these methods:
Glue or Varnish
The most common method involves using glue or var-
nish to tighten magnetic components. The motion of
core, bobbin and coil and the chattering or
magnetostriction of core can cause the transformer to
produce audible noise. The use of rigid glue and varnish
helps reducing the transformer noise. But, it also can
crack the core. This is because sudden changes in the
ambient temperature cause the core and the glue to
expand or shrink in a different ratio according to the
temperature.
Ceramic Capacitor
Using a film capacitor instead of a ceramic capacitor as
a snubber capacitor is another noise reduction solution.
Some dielectric materials show a piezoelectric effect
depending on the electric field intensity. Hence, a snub-
ber capacitor becomes one of the most significant
sources of audible noise. It is considerable to use a
zener clamp circuit instead of an RCD snubber for
higher efficiency as well as lower audible noise.
Adjusting Sound Frequency
Moving the fundamental frequency of noise out of 2~4
kHz range is the third method. Generally, humans are
more sensitive to noise in the range of 2~4 kHz. When
the fundamental frequency of noise is located in this
range, one perceives the noise as louder although the
noise intensity level is identical. Refer to Figure 22.Equal
Loudness Curves.
When FPS acts in Burst mode and the Burst operation
is suspected to be a source of noise, this method may
be helpful. If the frequency of Burst mode operation lies
in the range of 2~4 kHz, adjusting feedback loop can
shift the Burst operation frequency. In order to reduce
the Burst operation frequency, increase a feedback gain
capacitor (CF), opto-coupler supply resistor (RD) and
feedback capacitor (CB) and decrease a feedback gain
resistor (RF) as shown in Figure 23.Typical Feedback
Network of FPS.
Figure 22.Equal Loudness Curves
Figure 23. Typical Feedback Circuit
2. Other Reference Materials
AN-4134: Design Guidelines for Off-line Forward
Converters Using Fairchild Power Switch (FPSTM)
AN-4137: Design Guidelines for Off-line Flyback
Converters Using Fairchild Power Switch (FPS)
AN-4140: Transformer Design Consideration for Off-line
Flyback Converters using Fairchild Power Switch
(FPSTM)
AN-4141: Troubleshooting and Design Tips for Fairchild
Power Switch (FPSTM) Flyback Applications
AN-4147: Design Guidelines for RCD Snubber of
Flyback
AN-4148: Audible Noise Reduction Techniques for FPS
Applications
© 2008 Fairchild Semiconductor Corporation
FSEM311 • Rev. 1.0.0
11
www.fairchildsemi.com

11 Page







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