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PDF NB3M8T3910G Data sheet ( Hoja de datos )
| Número de pieza | NB3M8T3910G | |
| Descripción | 2.5V/3.3V 3:1:10 Configurable Differential Clock Fanout Buffer | |
| Fabricantes | ON Semiconductor | |
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NB3M8T3910G
2.5V/3.3V 3:1:10
Configurable Differential
Clock Fanout Buffer with
LVCMOS Reference Output
Description
The NB3M8T3910G is a 3:1:10 Clock fanout buffer operating on a
2.5 V/3.3 V Core VDD and a flexible 2.5 V / 3.3 V VDDO supply
(VDDO ≤ VDD).
A 3:1 MUX selects between Crystal oscillator inputs, or either of
two differential Clock inputs capable of accepting LVPECL, LVDS,
HCSL, or SSTL levels. The MUX select lines, SEL0 and SEL1, accept
LVCMOS or LVTTL levels and select input per Table 3. The Crystal
input is disabled when a Clock input is selected.
Differential Outputs consist of two banks of five differential outputs
with each bank independently mode configurable as LVPECL, LVDS
or HCSL. Each bank of differential output pairs is configured with a
pair of SMODEAx/Bx select lines using LVCMOS or LVTTL levels
per Table 6. Clock input levels and outputs states are determined per
Table 5.
The Single−Ended LVCMOS Output, REFOUT, is synchronously
enabled by the OE_SE control line per Table 4 using LVCMOS /
LVTTL levels. For Clock frequencies above 250 MHz, the REFOUT
line should be disabled.
www.onsemi.com
MARKING
DIAGRAM
1
1 48
QFN48
G SUFFIX
CASE 485AJ
NB3M8T
3910G
AWLYYWWG
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information on page 19 of
this data sheet.
Features
• Crystal, Single−Ended or Differential Input Reference
Clocks
• Differential Input Pair can Accept: LVPECL, LVDS,
HCSL, SSTL
• Two Output Banks: Each has Five Differential Outputs
Configurable as LVPECL, LVDS, or HCSL by
SMODEAx/Bx Pins
• One Single−Ended LVCMOS Output with Synchronous
OE Control
• LVCMOS/LVTTL Interface Levels for all Control
Inputs
• Clock Frequency: Up to 1400 MHz, Typical
• Output Skew: 50 ps (Max)
• Additive RMS Jitter <0.03 ps (156.25 MHz, Typical)
• Input to Output Propagation Delay (900 ps Typical)
• Operating Supply Modes VDD/VDDO: 2.5 V/2.5 V,
3.3 V/3.3 V or 3.3 V/2.5 V
• Industrial Temperature Range −40°C to 85°C
• This is a Pb−Free Device
Applications
• Clock Distribution
• Telecom
• Networking
• Backplane
• High End Computing
• Wireless and Wired Infrastructure
End Products
• Servers
• Ethernet Switch/Routers
• ATE
• Test and Measurement
© Semiconductor Components Industries, LLC, 2016
March, 2016 − Rev. 2
1
Publication Order Number:
NB3M8T3910/D
1 page  
NB3M8T3910G
DC ELECTRICAL CHARACTERISTICS
Table 9. DC ELECTRICAL CHARACTERISTICS POWER SUPPLY DC CHARACTERISTICS,
GND = 0.0 V; TA = −40°C to 85°C
Symbol
Parameter
Test Conditions
Min Typ Max Unit
VDD
VDDOx
IDD
Core Supply Voltage
Output Supply Voltage
Core Supply Current
LVPECL Outputs
LVDS Outputs
HCSL Outputs
2.375
3.465
V
2.375
3.465
V
85 120
155 185 mA
90 120
IDDO
Output Supply Current
All LVPECL Outputs Unloaded
ALL LVDS Outputs Loaded
All HCSL Output Unloaded
50 70
60 80 mA
45 60
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
Table 10. LVCMOS/LVTTL DC, VDD/VDDO = 2.5 V/2.5 V, 3.3 V/3.3 V or 3.3 V/2.5 V ±5%; GND = 0.0 V; TA = −40°C to 85°C
Symbol
Parameter
Test Conditions
Min Typ
Max
Unit
VIH Input High Voltage
(SEL0/1, SMODEA0/1, SMODEB0/1
OE_SE)
VIL Input Low Voltage
(SEL0/1, SMODEA0/1, SMODEB0/1
OE_SE)
IIH Input High Current
(SEL0/1, SMODEA0/1, SMODEB0/1
OE_SE)
VDD = 3.3 V
VDD = 2.5 V
VDD = 3.3 V
VDD = 2.5 V
VDD = VIN = 3.465 V
2
1.7
−0.3
−0.3
VDD + 0.3
VDD + 0.3
0.8
0.7
150
V
V
mA
IIL Input Low Current
(SEL0/1, SMODEA0/1, SMODEB0/1
OE_SE)
VDD = 3.465V, VIN = 0 V
−150
mA
VOH Output High Voltage (Note 3) REFOUT
VDDO = 3.3 V ±5%
VDDO = 2.5 V ±5%
2.3
1.5
V
VOL Output LOW Voltage (Note 3) REFOUT
VDDO = 3.3 V ±5%
VDDO = 2.5 V ±5%
0.5 V
0.4
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
3. Outputs terminated with 50 W to VDDO/2. See Parameter Measurement Information.
www.onsemi.com
5
5 Page 
NB3M8T3910G
TYPICAL PERFORMANCE CHARACTERISTICS
VDD = 3.3 V, VDDO = 3.3 V, TA = +25°C
LVPECL Output
CLK Source
Figure 6. LVPECL Phase Noise @ 156.25 MHz
LVDS Output
CLK Source
Figure 7. LVDS Phase Noise @ 156.25 MHz
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11
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| PDF Descargar | [ Datasheet NB3M8T3910G.PDF ] | |
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