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PDF FSDM07652RB Data sheet ( Hoja de datos )
| Número de pieza | FSDM07652RB | |
| Descripción | Green Mode Fairchild Power Switch (FPS) | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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www.fairchildsemi.com
FSDM07652RB
Green Mode Fairchild Power Switch (FPSTM)
Features
• Internal Avalanche Rugged Sense FET
• Advanced Burst-Mode operation consumes under 1 W at
240VAC & 0.5W load
• Precision Fixed Operating Frequency (66kHz)
• Internal Start-up Circuit
• Improved Pulse by Pulse Current Limiting
• Over Voltage Protection (OVP)
• Over Load Protection (OLP)
• Internal Thermal Shutdown Function (TSD)
• Auto-Restart Mode
• Under Voltage Lock Out (UVLO) with hysteresis
• Low Operating Current (2.5mA)
• Built-in Soft Start
Application
• SMPS for LCD monitor and STB
• Adaptor
Description
The FSDM07652RB is an integrated Pulse Width Modulator
(PWM) and Sense FET specifically designed for high perfor-
mance offline Switch Mode Power Supplies (SMPS) with
minimal external components. This device is an integrated
high voltage power switching regulator which combine an
avalanche rugged Sense FET with a current mode PWM con-
trol block. The PWM controller includes integrated fixed fre-
quency oscillator, under voltage lockout, leading edge blanking
(LEB), optimized gate driver, internal soft start, temperature
compensated precise current sources for a loop compensation
and self protection circuitry. Compared with discrete MOS-
FET and PWM controller solution, it can reduce total cost,
component count, size and weight simultaneously increasing ef-
ficiency, productivity, and system reliability. This device is a
basic platform well suited for cost effective designs of fly-
back converters.
OUTPUT POWER TABLE
230VAC ±15%(3)
85-265VAC
PRODUCT
Adapt- Open Adapt- Open
er(1) Frame(2) er(1) Frame(2)
FSDM0565RB 60W
70W
50W
60W
FSDM07652RB 70W
80W
60W
70W
Table 1. Maximum Output Power
Notes:
1. Typical continuous power in a non-ventilated enclosed
adapter measured at 50°C ambient.
2. Maximum practical continuous power in an open frame
design at 50°C ambient.
3. 230 VAC or 100/115 VAC with doubler.
Typical Circuit
AC
IN
Vstr Drain
PWM
Vfb Vcc Source
DC
OUT
Figure 1. Typical Flyback Application
©2004 Fairchild Semiconductor Corporation
Rev.1.0.4
1 page  
Electrical Characteristics
(Ta = 25°C unless otherwise specified)
Parameter
Sense FET SECTION
Drain source breakdown voltage
Zero gate voltage drain current
Static drain source on resistance (1)
Output capacitance
Turn on delay time
Rise time
Turn off delay time
Fall time
CONTROL SECTION
Initial frequency
Voltage stability
Temperature stability (2)
Maximum duty cycle
Minimum duty cycle
Start threshold voltage
Stop threshold voltage
Feedback source current
Soft-start time
Leading Edge Blanking time
BURST MODE SECTION
Burst Mode Voltages (2)
PROTECTION SECTION
Peak current limit (4)
Over voltage protection
Thermal shutdown temperature (2)
Shutdown feedback voltage
Shutdown delay current
FSDM07652RB
Symbol
Condition
Min. Typ. Max. Unit
BVDSS VGS = 0V, ID = 250µA 650 -
-V
IDSS
VDS = 650V, VGS = 0V
VDS= 520V
VGS = 0V, TC = 125°C
-
-
- 500 µA
- 500 µA
RDS(ON) VGS = 10V, ID = 2.5A
- 1.4 1.6 Ω
COSS
VGS = 0V, VDS = 25V,
f = 1MHz
- 100 - pF
TD(ON) VDD= 325V, ID= 5A
- 22 -
(MOSFET switching
TR
TD(OFF)
time is essentially
independent of
- 60 -
- 115 -
ns
operating temperature)
TF - 65 -
FOSC
FSTABLE
∆FOSC
DMAX
DMIN
VSTART
VSTOP
IFB
TS
TLEB
VFB = 3V
13V ≤ Vcc ≤ 18V
-25°C ≤ Ta ≤ 85°C
-
-
VFB=GND
VFB=GND
VFB=GND
Vfb=3
-
60 66 72 kHz
0 1 3%
0 ±5 ±10 %
75 80 85 %
- - 0%
11 12 13 V
78 9V
0.7 0.9 1.1 mA
- 10 15 ms
- 250 -
ns
VBURH
VBURL
Vcc=14V
Vcc=14V
- 0.7 -
- 0.5 -
V
V
IOVER
VOVP
TSD
VSD
IDELAY
VFB=5V, VCC=14V
-
VFB ≥ 5.5V
VFB=5V
2.2 2.5 2.8 A
18 19 20 V
130 145 160 °C
5.5 6.0 6.5 V
2.8 3.5 4.2 µA
5
5 Page 
FSDM07652RB
Functional Description
1. Startup : In previous generations of Fairchild Power
Switches (FPSTM) the Vcc pin had an external start-up
resistor to the DC input voltage line. In this generation the
startup resistor is replaced by an internal high voltage current
source. At startup, an internal high voltage current source
supplies the internal bias and charges the external capacitor
(Cvcc) that is connected to the Vcc pin as illustrated in
Figure 4. When Vcc reaches 12V, the FSDM07652RB
begins switching and the internal high voltage current source
is disabled. Then, the FSDM07652RB continues its normal
switching operation and the power is supplied from the
auxiliary transformer winding unless Vcc goes below the
stop voltage of 8V.
CVcc
VDC
2.1 Pulse-by-pulse current limit: Because current mode
control is employed, the peak current through the Sense FET
is limited by the inverting input of PWM comparator (Vfb*)
as shown in Figure 5. Assuming that the 0.9mA current
source flows only through the internal resistor (2.5R +R= 2.8
kΩ), the cathode voltage of diode D2 is about 2.5V. Since D1
is blocked when the feedback voltage (Vfb) exceeds 2.5V,
the maximum voltage of the cathode of D2 is clamped at this
voltage, thus clamping Vfb*. Therefore, the peak value of
the current through the Sense FET is limited.
2.2 Leading edge blanking (LEB) : At the instant the
internal Sense FET is turned on, there usually exists a high
current spike through the Sense FET, caused by primary-side
capacitance and secondary-side rectifier reverse recovery.
Excessive voltage across the Rsense resistor would lead to
incorrect feedback operation in the current mode PWM
control. To counter this effect, the FSDM07652RB employs
a leading edge blanking (LEB) circuit. This circuit inhibits
the PWM comparator for a short time (TLEB) after the Sense
FET is turned on.
Vcc
3
8V/12V
Vcc good
Vstr
6
Istart
Vref
Internal
Bias
Figure 4. Internal startup circuit
Vcc Vref
Idelay
IFB
Vo Vfb
H11A817A
4
CB
OSC
D1 D2
2.5R
KA431
+
Vfb* R
-
SenseFET
Gate
driver
VSD
OLP
Rsense
Figure 5. Pulse width modulation (PWM) circuit
2. Feedback Control : FSDM07652RB employs current
mode control, as shown in Figure 5. An opto-coupler (such
as the H11A817A) and shunt regulator (such as the KA431)
are typically used to implement the feedback network.
Comparing the feedback voltage with the voltage across the
Rsense resistor plus an offset voltage makes it possible to
control the switching duty cycle. When the reference pin
voltage of the KA431 exceeds the internal reference voltage
of 2.5V, the H11A817A LED current increases, thus pulling
down the feedback voltage and reducing the duty cycle. This
event typically happens when the input voltage is increased
or the output load is decreased.
3. Protection Circuit : The FSDM07652RB has several self
protective functions such as over load protection (OLP), over
voltage protection (OVP) and thermal shutdown (TSD).
Because these protection circuits are fully integrated into the
IC without external components, the reliability can be
improved without increasing cost. Once the fault condition
occurs, switching is terminated and the Sense FET remains
off. This causes Vcc to fall. When Vcc reaches the UVLO
stop voltage, 8V, the protection is reset and the internal high
voltage current source charges the Vcc capacitor via the Vstr
pin. When Vcc reaches the UVLO start voltage,12V, the
FSDM07652RB resumes its normal operation. In this
manner, the auto-restart can alternately enable and disable
the switching of the power Sense FET until the fault
condition is eliminated (see Figure 6).
11
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet FSDM07652RB.PDF ] | |
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