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PDF FSDL321 Data sheet ( Hoja de datos )
| Número de pieza | FSDL321 | |
| Descripción | Green Mode Fairchild Power Switch (FPSTM) | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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www.fairchildsemi.com
FSDH321, FSDL321
Green Mode Fairchild Power Switch (FPSTM)
Features
• Internal Avalanche Rugged Sense FET
• Consumes only 0.65W at 240VAC & 0.3W load with
Advanced Burst-Mode Operation
• Frequency Modulation for low EMI
• Precision Fixed Operating Frequency
• Internal Start-up Circuit
• Pulse by Pulse Current Limiting
www.Da•taAShbeneort4mUa.lcOomver Current Protection
• Over Voltage Protection
• Over Load Protection
• Internal Thermal Shutdown Function
• Auto-Restart Mode
• Under Voltage Lockout
• Low Operating Current (max 3mA)
• Adjustable Peak Current Limit
• Built-in Soft Start
Applications
• SMPS for STB, Low cost DVD
• Auxiliary Power for PC
• Adaptor for Charger
OUTPUT POWER TABLE
230VAC ±15%(3)
85-265VAC
PRODUCT
Adapt- Open Adapt- Open
er(1) Frame(2) er(1) Frame(2)
FSDL321
11W
17W
8W
12W
FSDH321
11W
17W
8W
12W
FSDL0165RN 13W
23W
11W
17W
FSDM0265RN 16W
27W
13W
20W
FSDH0265RN 16W
27W
13W
20W
FSDL0365RN 19W
30W
16W
24W
FSDM0365RN 19W
30W
16W
24W
FSDL321L
11W
17W
8W
12W
FSDH321L
11W
17W
8W
12W
FSDL0165RL 13W
23W
11W
17W
FSDM0265RL 16W
27W
13W
20W
FSDH0265RL 16W
27W
13W
20W
FSDL0365RL 19W
30W
16W
24W
FSDM0365RL 19W
30W
16W
24W
Description
The FSDx321(x stands for H, L) are integrated Pulse Width
Modulators (PWM) and Sense FETs specifically designed
for high performance offline Switch Mode Power Supplies
(SMPS) with minimal external components. Both devices
are integrated high voltage power switching regulators
which combine an avalanche rugged Sense FET with a cur-
rent mode PWM control block. The integrated PWM con-
troller features include: a fixed oscillator with frequency
modulation for reduced EMI, Under Voltage Lock Out
(UVLO) protection, Leading Edge Blanking (LEB), opti-
mized gate turn-on/turn-off driver, Thermal Shut Down
(TSD) protection, Abnormal Over Current Protection
(AOCP) and temperature compensated precision current
sources for loop compensation and fault protection circuitry.
When compared to a discrete MOSFET and controller or
RCC switching converter solution, the FSDx321 reduce total
component count, design size, weight and at the same time
increase efficiency, productivity, and system reliability. Both
devices are a basic platform well suited for cost effective
designs of flyback converters.
Table 1. Notes: 1. Typical continuous power in a non-ven-
tilated enclosed adapter measured at 50°C ambient. 2.
Maximum practical continuous power in an open frame
design at 50°C ambient. 3. 230 VAC or 100/115 VAC with
doubler.
Typical Circuit
AC
IN
Vstr Drain
Ipk
PWM
Vfb Vcc Source
DC
OUT
Figure 1. Typical Flyback Application
©2004 Fairchild Semiconductor Corporation
Rev.1.0.2
1 page  
FSDH321, FSDL321
Electrical Characteristics (Sense FET Part)
(Ta = 25°C unless otherwise specified)
Parameter
Sense FET SECTION
Drain-Source Breakdown Voltage
Startup Voltage (Vstr) Breakdown
Zero Gate Voltage Drain Current
Static Drain-Source on Resistance
(Note)
www.DatFaoShrweeatr4dUT.croamns conductance (Note)
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn on Delay Time
Rise Time
Turn Off Delay Time
Fall Time
Total Gate Charge
(Gate-Source + Gate-Drain)
Gate-Source Charge
Gate-Drain (Miller) Charge
Symbol
Condition
Min. Typ. Max. Unit
BVDSS
BVSTR
IDSS
VGS=0V, ID=50µA
VCC=0V, ID=1mA
VDS=Max. Rating,
VGS=0V
VDS=0.8Max. Rating,
VGS=0V, TC=125°C
650 720
650 720
--
-
-
25
- - 200
RDS(ON) VGS=10V, ID=0.5A
- 14 19
gfs
CISS
COSS
CRSS
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
VDS=50V, ID=0.5A
VGS=0V, VDS=25V,
f=1MHz
VDD=0.5B VDSS,
ID=1.0A
(MOSFET switching time
is essentially
independent of
operating temperature)
VGS=10V, ID=1.0A,
VDS=0.5B VDSS
(MOSFET switching time
is essentially
independent of operating
temperature)
1.0
-
-
-
-
-
-
-
-
-
-
1.3
162
18
3.8
9.5
19
33
42
7.0
3.1
0.4
-
-
-
-
-
-
-
-
-
-
-
V
V
µA
µA
Ω
S
pF
ns
nC
Note:
1. Pulse test: Pulse width ≤ 300µS, duty ≤ 2%
2. S = -1--
R
5
5 Page 
FSDH321, FSDL321
Vcc
8V
OLP
6V
FPS switching
3V
t1
Delay current (5uA) charges the Cfb
t2 t3
Following Vcc
t4 t
t1 =
−
1
RC fb
In (1 − V (t1) ); V (t1)
R
=
3V , R
=
2.8 K Ω , C fb
=
C fb _
fig .2
www.DataShet2e=tC4Ufb (.Vc(ot1m+Itd2el)ay−V(t1)) ; Idelay = 5uA,V(t1+ t2) −V(t1) = 3V
Figure 6. Over load protection
4.2 Thermal Shutdown (TSD) : The Sense FET and the con-
trol IC are integrated, making it easier for the control IC to
detect the temperature of the Sense FET. When the tempera-
ture exceeds approximately 140°C, thermal shutdown is acti-
vated.
enabled and monitors the current through the sensing resis-
tor. The voltage across the resistor is then compared with a
preset AOCP level. If the sensing resistor voltage is greater
than the AOCP level, pulse by pulse AOCP is triggered
regardless of uncontrollable LEB time. Here, pulse by pulse
AOCP stops Sense FET within 350nS after it is activated.
4.4 Over Voltage Protection (OVP) : In case of malfunc-
tion in the secondary side feedback circuit, or feedback loop
open caused by a defect of solder, the current through the
opto-coupler transistor becomes almost zero. Then, Vfb
climbs up in a similar manner to the over load situation, forc-
ing the preset maximum current to be supplied to the SMPS
until the over load protection is activated. Because excess
energy is provided to the output, the output voltage may
exceed the rated voltage before the over load protection is
activated, resulting in the breakdown of the devices in the
secondary side. In order to prevent this situation, an over
voltage protection (OVP) circuit is employed. In general,
Vcc is proportional to the output voltage and the FPSTM uses
Vcc instead of directly monitoring the output voltage. If
VCC exceeds 19V, OVP circuit is activated resulting in ter-
mination of the switching operation. In order to avoid undes-
ired activation of OVP during normal operation, Vcc should
be properly designed to be below 19V.
4.3 Abnormal Over Current Protection (AOCP) :
PWM
COMPARATOR
Vfb
LEB
Vsense
AOCP
COMPARATOR
CLK
SQ
R
Out Driver
Drain
5. Soft Start : The FPSTM has an internal soft start circuit that
increases the feedback voltage together with the Sense FET
current slowly after it starts up. The typical soft start time is
15msec, as shown in figure 8, where progressive increments
of Sense FET current are allowed during the start-up phase.
The pulse width to the power switching device is progres-
sively increased to establish the correct working conditions
for transformers, inductors, and capacitors. The voltage on
the output capacitors is progressively increased with the
intention of smoothly establishing the required output volt-
age. It also helps to prevent transformer saturation and
reduce the stress on the secondary diode.
VAOCP
Rsense
Figure 7. AOCP Function & Block
0.7A
Drain current
[A]
Even though the FPSTM has OLP (Over Load Protection)
and current mode PWM feedback, these are not enough to
protect the FPSTM when a secondary side diode short or a
transformer pin short occurs. In addition to start-up, soft-
start is also activated at each restart attempt during auto-
restart and when restarting after latch mode is activated. The
FPSTM has an internal AOCP (Abnormal Over Current Pro-
tection) circuit as shown in figure 7. When the gate turn-on
signal is applied to the power Sense FET, the AOCP block is
0.4A
Tss
11
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet FSDL321.PDF ] | |
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