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PDF LC786961W Data sheet ( Hoja de datos )
| Número de pieza | LC786961W | |
| Descripción | Compact Disc Player IC | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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Ordering number : ENA2081A
LC786961W
CMOS LSI
Compact Disc Player IC
http://onsemi.com
Overview
The LC786961W integrates ARM7TDMI-S™, CD servo control, CD signal processing, compressed audio decode
processing, audio signal processing, USB host processing, SD memory card host processing and a flash memory to
store the program for ARM7TDMI-S™ and various data in a package. Furthermore, various kinds of interface
functions such as SIO, UART etc. reduce the external main controller’s processing load and make high performance
and much functional CD player system, using with less components.
Features
RF signal processing for CD-DA/R/RW, servo control, EFM signal processing, and anti-shock processing
MP3*, WMA*, AAC* decoder processing
Sampling rate convertor, High frequency compensation filter and other various audio signal processing
USB host function (Full speed as 12Mbps), SD memory card host function
ARM7TDMI-S™ as internal CPU core, flash memory for program and various data storage
Operating voltage: 3.3V typical
Operating temperature: 40C to +85C
Packages: SQFP144 (20 20)
ORDERING INFORMATION
See detailed ordering and shipping information on page 29 of this data sheet.
SQFP144(20X20)
is a registered trademark of ARM Limited.
* MP3(MPEG Layer-3 Audio Coding)
MPEG Layer-3 audio coding technology licensed from Fraunhofer IIS and Thomson.
Supply of this product does not convey license under the relevant intellectual property of Thomson and/or Fraunhofer Gesellschaft nor imply
any right to use this product in any finished end user or ready-to-use final product. An independent license for such use is required.
For details, please visit http://mp3licensing.com/.
* Windows Media Audio
Windows MediaTM is a trademark and a registered trademark in the United States and other countries of United States Microsoft Corporation.
* AAC
Advanced Audio Coding
* This product is licensed from Silicon Storage Technology Inc. (USA).
Semiconductor Components Industries, LLC, 2013
September, 2013 Ver. 1.0.0
72413HK/80112HKPC 20120531-S00006 No.A2081-1/29
1 page  
LC786961W
Specifications
Absolute Maximum Ratings at Ta = 25C, DVSS = AVSS = LRVSS = XVSS1 = XVSS2 = VVSS1 = VVSS2 = 0V
Parameter
Symbol
Pin names
Conditions
Ratings
Unit
Maximum supply voltage
Input voltage 1
Input voltage 2
Output voltage
Allowable power dissipation
Operating temperature
VDD max
VIN1
VIN2
VOUT
Pd max
Topr
DVDD, AVDD, LRVDD, XVDD1,
XVDD2, UVDD, VVDD1, VVDD2,
VVDD3
Input pins other than VIN2
RESB, SIFCK, SIFDI, SIFDO,
SIFCE, BUSYB, GP03, GP04,
GP05, GP06, GP07, GP10,
GP11, GP12, GP14, GP15,
GP16, GP26, GP27, JTRSTB,
JTCK, JTDI, JTMS
Ta 85C
Mounted reference PCB (*)
-0.3 to +3.95
-0.3 to DVDD+0.3
V
V
-0.3 to +5.6
V
-0.3 to DVDD+0.3
540
-40 to +85
V
mW
C
Storage temperature
Tstg
(*)Reference PCB: 114.3mm×76.1mm×1.6mm, glass epoxy resin
-40 to +125
C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Allowable Operating Ranges at Ta = -40 to +85C, DVSS = AVSS = LRVSS = XVSS1 = XVSS2 = VVSS1 =
VVSS2 = 0V
Parameter
Symbol
Pin names
Conditions
min typ max Unit
Supply voltage
High-level input voltage
VDD1
VIH(1)
VIH(2)
Low-level input voltage
VIL(1)
VIL(2)
Crystal oscillator frequency
FX1
DVDD, AVDD, LRVDD, XVDD1,
XVDD2, UVDD, VVDD1, VVDD2,
VVDD3
RESB, SIFCK, SIFDI, SIFDO,
SIFCE, BUSYB, GP03, GP04,
GP05, GP06, GP07, GP10,
GP11, GP12, GP14, GP15,
GP16, GP26, GP27, JTMS,
JTRSTB, JTCK, JTDI
GP13, GP17, GP20, GP21,
GP22, GP23, GP24, GP25,
GP60, GP61, GP62, GP63,
GP64, GP65,
SDDAT00 to SDDAT15,
PMODE0, PMODE1
RESB, SIFCK, SIFDI,
SIFDO, SIFCE, BUSYB,
GP03, GP04, GP05, GP06,
GP07, GP10, GP11, GP12,
GP14, GP15, GP16, GP26,
GP27, JTMS, JTRSTB,
JTCK, JTDI
GP13, GP17, GP20, GP21,
GP22, GP23, GP24, GP25,
GP60, GP61, GP62, GP63,
GP64, GP65,
SDDAT00 to SDDAT15,
MODE0, MODE1, MODE2
XIN
XOUT
Schmitt
Schmitt
Schmitt
Schmitt
Oscillator circuit
3.00
2.00
3.60 V
5.50 V
2.00
VDD1
V
0 0.80 V
0 0.80 V
12.0
MHz
FX2 X16IN
X16OUT
Oscillator circuit
16.9344
MHz
No.A2081-5/29
5 Page 
Continued from the previous page.
Pin
Pin name
No.
State when
I/O
"Reset"
90 SIFDO
I/O Input
91 SIFCE
I/O Input
92 BUSYB
I/O Input (L)
93 GP03
I/O Input (L)
94 GP04
I/O Input (L)
95 GP05
96 GP06
97 GP07
98 XVDD1
99 XIN
100 XOUT
101 XVSS1
102 UDM
103 UDP
104 UVDD
105 VVDD2
106 VVSS2
107 AFILT
108 VVDD3
109 MODE2
110 JTRSTB
I/O Input (L)
I/O Input (L)
I/O Input (L)
--
I Oscillation
O Oscillation
--
I/O -
I/O -
--
--
--
AO Undefined
--
I Input
I Input
111 JTCK
I Input
112 JTDI
I Input
113 JTMS
114 JTDO
115 JTRTCK
116 GP20
I Input
O Low
O Low
I/O Input (L)
117 GP21
I/O Input (L)
118 GP22
I/O Input (L)
119 GP23
I/O Input (L)
120 GP24
I/O Input (L)
121 GP25
122 DVDD
123 DVSS
124 DVDD15
125 GP14
126 GP15
127 GP16
128 GP17
129 GP60
130 GP61
I/O Input (L)
--
--
AO High
I/O Input (L)
I/O Input (L)
I/O Input (L)
I/O Input (L)
I/O Input (L)
I/O Input (L)
LC786961W
Function
Host-I/F
Data output for serial communication 1 (CMOS or 3-State output)
Host -I/F
Enable signal input for serial communication 1 ("H"-active)
Host -I/F
System busy signal output ("L"-active)
General purpose I/O port with pull down resistor
USB device detection flag output
General purpose I/O port with pull down resistor
IIC (master) clock output
General purpose I/O port with pull down resistor
IIC (master) data input/output
General purpose I/O port with pull down resistor
General purpose I/O port with pull down resistor
Oscillator power supply
12MHz oscillator connection
12MHz oscillator connection
Oscillator ground. This pin must be connected to the 0V level.
USB data input/output D- signal connection
USB data input/output D+ signal connection
USB power supply
System PLL power supply
System PLL ground. This pin must be connected to the 0V level.
Audio PLL charge pump output
Audio PLL power supply
LSI mode set pin 2 This pin must be connected to the 0V level.
JTAG reset input
(Connect to pll-down resister or 0V level in normal mode.)
JTAG clock input
(Connect to pll-down resister or 0V level in normal mode.)
JTAG data input
(Connect to pll-down resister or 0V level in normal mode.)
JTAG mode input
(Connect to pll-up resister or DVDD level in normal mode.)
JTAG data output (Leave open in normal mode.)
JTAG return clock output (Leave open in normal mode.)
General purpose I/O port with pull down resistor
Data 1 input/output for SD memory card
General purpose I/O port with pull down resistor
Data 0 input/output for SD memory card
General purpose I/O port with pull down resistor
Clock output for SD memory card
General purpose I/O port with pull down resistor
Command input/output for SD memory card
General purpose I/O port with pull down resistor
Data 3 input/output for SD memory card
General purpose I/O port with pull down resistor
Data 2 input/output for SD memory card
Digital system power supply
Digital system ground. This pin must be connected to the 0V level.
Capacitor connection pin for internal regulator
General purpose I/O port with pull down resistor
General purpose I/O port with pull down resistor
General purpose I/O port with pull down resistor
General purpose I/O port with pull down resistor
General purpose I/O port with pull down resistor
General purpose I/O port with pull down resistor
Continued to the next page.
No.A2081-11/29
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet LC786961W.PDF ] | |
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