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PDF RJK03N3DPA Data sheet ( Hoja de datos )

Número de pieza RJK03N3DPA
Descripción N Channel Power MOS FET
Fabricantes Renesas Technology 
Logotipo Renesas Technology Logotipo



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No Preview Available ! RJK03N3DPA Hoja de datos, Descripción, Manual

RJK03N3DPA
30V, 35A, 4.7mmax.
Built in SBD N Channel Power MOS FET
High Speed Power Switching
Features
High speed switching
Capable of 4.5 V gate drive
Low drive current
High density mounting
Low on-resistance
Pb-free
Halogen-free
Outline
Preliminary Datasheet
R07DS0784EJ0200
Rev.2.00
Feb 12, 2013
RENESAS Package code: PWSN0008DE-A
(Package name: WPAK(3F))
5678
5 678
D DDD
4321
4
G
1, 2, 3 Source
4 Gate
5, 6, 7, 8 Drain
S SS
1 23
Absolute Maximum Ratings
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body-drain diode reverse drain current
Avalanche current
Avalanche energy
Channel dissipation
Channel to case thermal impedance
Channel temperature
Storage temperature
Notes: 1. PW 10 s, duty cycle 1%
2. Value at Tch = 25C, Rg 50
3. Tc = 25C
Symbol
VDSS
VGSS
ID
ID(pulse)Note1
IDR
IAP Note 2
EAS Note 2
Pch Note3
ch-c Note3
Tch
Tstg
Ratings
30
±12
35
140
35
13
16.9
35
3.57
150
–55 to +150
(Ta = 25°C)
Unit
V
V
A
A
A
A
mJ
W
C/W
C
C
R07DS0784EJ0200 Rev.2.00
Feb 12, 2013
Page 1 of 6

1 page




RJK03N3DPA pdf
RJK03N3DPA
3
Normalized Transient Thermal Impedance vs. Pulse Width
Preliminary
Vin
10 V
1
D=1
0.5
0.3
0.2
0.1
0.03
0.1
0.05
0.02
01.s0h1ot pulse
0.01
10 μ
100 μ
θch c(t) = γs (t) θch c
θch c = 3.57°C/W, Tc = 25°C
PDM
D=
PW
T
PW
T
1m
10 m
100 m
Pulse Width PW (S)
1
10
Avalanche Test Circuit
VDS
Monitor
Rg
L
IAP
Monitor
D. U. T
VDD
Avalanche Waveform
EAS =
1
2
L IAP2
VDSS
VDSS VDD
IAP
ID
V(BR)DSS
VDS
VDD
0
Switching Time Test Circuit
Vin Monitor
Rg
D.U.T.
Vout
Monitor
RL
Vin VDS
8 V = 10 V
Switching Time Waveform
90%
Vin
Vout
10%
10%
10%
90%
90%
td(on)
tr td(off)
tf
R07DS0784EJ0200 Rev.2.00
Feb 12, 2013
Page 5 of 6

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