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PDF AR0542 Data sheet ( Hoja de datos )

Número de pieza AR0542
Descripción 1/4-Inch 5 Mp CMOS Digital Image Sensor
Fabricantes ON Semiconductor 
Logotipo ON Semiconductor Logotipo



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AR0542: 1/4-Inch CMOS Digital Image Sensor
Features
1/4-Inch 5 Mp CMOS Digital Image Sensor
AR0542 Datasheet, Rev. H
For the latest datasheet, please visit www.onsemi.com
Features
• Low dark current
• Simple two-wire serial interface
• Auto black level calibration
• Support for external LED or Xenon flash
• High frame rate preview mode with arbitrary down-
size scaling from maximum resolution
• Programmable controls: gain, horizontal and vertical
blanking, auto black level offset correction,
frame size/rate, exposure, left–right and top–bottom
image reversal, window size, and panning
• Data interfaces: parallel or single/dual lanes serial
mobile industry processor interface (MIPI)
• On-die phase-locked loop (PLL) oscillator
• Bayer pattern down-size scaler
• Superior low-light performance
• Integrated position and color-based shading
correction
• 7.7 Kb one-time programmable memory (OTPM) for
storing shading correction coefficients of three light
sources and module information
• Extended Flash duration that is up to start of frame
readout
• On-chip VCM driver
Applications
• Cellular phones
• Digital still cameras
• PC cameras
• PDAs
General Description
The ON Semiconductor AR0542 is a 1/4-inch CMOS
active-pixel digital image sensor with a pixel array of
2592H x 1944V (2608H x 1960V including border pix-
els). It incorporates sophisticated on-chip camera
functions such as windowing, mirroring, column and
row skip modes, and snapshot mode. It is programma-
ble through a simple two-wire serial interface and has
very low power consumption.
Table 1:
Key Performance Parameters
Parameter
Optical format
Active imager size
Active pixels
Pixel size
Chief ray angle
Color filter array
Shutter type
Input clock frequency
Maximum Parallel
data rate MIPI
Full resolution
(2592 x1944)
1080P
Frame rate
720P
VGA (640x480)
ADC resolution
Responsivity
Dynamic range
SNRMAX
Supply
voltage
Digital I/O
Digital Core
Analog
Digital 1.8 V
Power
Consump- Full resolution
tion Standby*
Package
Operating temperature
Value
1/4-inch (4:3)
3.63 mm (H) x 2.72(V):4.54 mm
diagonal
2592H x 1944V
1.4 m x 1.4 m
25.0°
RGB Bayer pattern
Electronic rolling shutter (ERS)
6–27 MHz
84 Mbps at 84 MHz PIXCLK
840 Mbps per lane
15 fps
19.8 fps (100% FOV, crop to 16:9)
30 fps(77% FOV, crop to 16:9)
30 fps (98% FOV, crop to 16:9, bin2)
60 fps (98% FOV, crop to 16:9, skip2)
60 fps (100% FOV, bin2skip2)
115 fps (100% FOV, skip4)
10-bit, on-die
0.82 V/lux-sec (550 nm)
66 dB
36.5 dB
1.7–1.9 V (1.8 V nominal)
or 2.4–3.1 V (2.8 V nominal)
1.15-1.25 V(1.2 V nominal)
2.6–3.1 V (2.8 V nominal)
1.7–1.9 V (1.8 V nominal)
Parallel: 288.2 mW at 70°C (TYP)
MIPI: 215 mW at 70°C (TYP)
25 W at 70°C (TYP)
Bare die
–30°C to +70°C (at junction)
Note: * Hard Standby by pulling XShutdown LOW.
AR0542_DS Rev. H Pub. 5/15 EN
1 ©Semiconductor Components Industries, LLC 2015,

1 page




AR0542 pdf
AR0542: 1/4-Inch CMOS Digital Image Sensor
List of Tables
List of Tables
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Table 42:
Key Performance Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Available Part Numbers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
Signal Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Row Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Definitions for Programming Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Programming Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Output Enable Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Configuration of the Pixel Data Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
XSHUTDOWN and PLL in System States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Signal State During Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Streaming/STANDBY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Row Address Sequencing During Subsampling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
Column Address Sequencing During Binning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
Row Address Sequencing During Binning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
Readout Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
Minimum Row Time and Blanking Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
Minimum Frame Time and Blanking Numbers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
fine_integration_time Limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49
fine_correction Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49
Gain Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51
Gain Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52
Test Patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53
Power-Up Signal Timing with Pin-constrained Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60
Power-Up Signal Timing with Pin-unconstrained Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61
Power-Down Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62
Hard Standby with Pin-constrained Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64
Hard Standby with Pin-unconstrained Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64
VCM Driver Typical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66
Recommended IR Cut Limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67
Two-Wire Serial Interface Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69
Two-Wire Serial Interface Timing Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .70
Electrical Characteristics (EXTCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71
Electrical Characteristics (Parallel Pixel Data Interface) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72
HS Transmitter DC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
HS Transmitter AC Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
LP Transmitter DC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
LP Transmitter AC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74
DC Electrical Characteristics (Control Interface) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75
Data-Clock Timing Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76
DC Electrical Characteristics (Control Interface) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77
DC Electrical Definitions and Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77
Absolute Maximum Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78
AR0542_DS Rev. H Pub. 5/15 EN
5 ©Semiconductor Components Industries, LLC, 2015.

5 Page





AR0542 arduino
AR0542: 1/4-Inch CMOS Digital Image Sensor
Signal Descriptions
Signal Descriptions
Table 3 provides signal descriptions for AR0542 die. For pad location and aperture infor-
mation, refer to the AR0542 die data sheet.
Table 3:
Signal Descriptions
Pad Name
EXTCLK
RESET_BAR
XSHUTDOWN
SCLK
GPI[3:0]
TEST
SDATA
VCM_ISINK
VCM_GND
REG_OUT
REG_IN
REG_FB
DATA0_P
DATA0_N
DATA1_P
DATA1_N
CLK_P
CLK_N
LINE_VALID
FRAME_VALID
DOUT[9:0]
PIXCLK
FLASH
VPP
VDD_TX
VAA
VAA_PIX
AGND
VDD
VDD_IO
DGND
VDD_PLL
Pad Type
Input
Input
Input
Input
Input
Input
I/O
I/O
I/O
I/O
I/O
I/O
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Description
Master clock input, 6–27 MHz.
Asynchronous active LOW reset. When asserted, data output stops and all internal registers are
restored to their factory default settings.
Asynchronous active LOW reset. When asserted, data output stops and all internal registers are
restored to their factory default settings. This pin will turn off the digital power domain and is the
lowest power state of the sensor.
Serial clock for access to control and status registers.
General purpose inputs. After reset, these pads are powered-down by default; this means that it is
not necessary to bond to these pads. Any of these pads can be configured to provide hardware
control of the standby, output enable, SADDR select, and shutter trigger functions.
ON Semiconductor recommends that unused GPI pins be tied to DGND, but can also be left
floating.
Enable manufacturing test modes. Connect to VDD_IO power for the MIPI-configured sensor.
Serial data from reads and writes to control and status registers.
Connected to VCM actuator. 100mA max. 3.3V max.
Connected to DGND.
1.2V on-chip regulator output node.
On-chip regulator input node. It needs to be connected to external 1.8V.
This pad is receiving the 1.2V feedback from REG_OUT. It needs to be connected to REG_OUT.
Differential MIPI (sub-LVDS) serial data (positive).
Differential MIPI (sub-LVDS) serial data (negative).
Differential MIPI (sub-LVDS) serial data 2nd lane (positive).
Can be left floating when using one-lane MIPI serial interface.
Differential MIPI (sub-LVDS) serial data second lane (negative).
Can be left floating when using one-lane MIPI serial interface.
Differential MIPI (sub-LVDS) serial clock/strobe (positive).
Differential MIPI (sub-LVDS) serial clock/strobe (negative).
LINE_VALID (LV) output. Qualified by PIXCLK.
FRAME_VALID (FV) output. Qualified by PIXCLK.
Parallel pixel data output. Qualified by PIXCLK.
Pixel clock. Used to qualify the LV, FV, and DOUT[9:0] outputs.
Flash output. Synchronization pulse for external light source. Can be left floating if not used.
Power supply used to program one-time programmable (OTP) memory.
Digital PHY power supply. Digital power supply for the serial interface.
Analog power supply.
Analog power supply for the pixel array.
Analog ground.
Digital core power supply.
I/O power supply.
Common ground for digital and I/O.
PLL power supply.
AR0542_DS Rev. H Pub. 5/15 EN
11
©Semiconductor Components Industries, LLC, 2015.

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