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PDF CAT25320 Data sheet ( Hoja de datos )

Número de pieza CAT25320
Descripción 32Kb SPI Serial CMOS EEPROM
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No Preview Available ! CAT25320 Hoja de datos, Descripción, Manual

CAT25320
32-Kb SPI Serial CMOS
EEPROM
Description
The CAT25320 is a 32−Kb Serial CMOS EEPROM device
internally organized as 4096x8 bits. This features a 32−byte page write
buffer and supports the Serial Peripheral Interface (SPI) protocol. The
device is enabled through a Chip Select (CS) input. In addition, the
required bus signals are clock input (SCK), data input (SI) and data
output (SO) lines. The HOLD input may be used to pause any serial
communication with the CAT25320 device. The device features
software and hardware write protection, including partial as well as
full array protection.
Features
10 MHz SPI Compatible
1.8 V to 5.5 V Supply Voltage Range
SPI Modes (0,0) & (1,1)
32−byte Page Write Buffer
Self−timed Write Cycle
Hardware and Software Protection
Block Write Protection
− Protect 1/4, 1/2 or Entire EEPROM Array
Low Power CMOS Technology
1,000,000 Program/Erase Cycles
100 Year Data Retention
Industrial and Extended Temperature Range
PDIP, SOIC, TSSOP 8−lead, TDFN and UDFN 8−pad Packages
This Device is Pb−Free, Halogen Free/BFR Free, and RoHS
Compliant
VCC
SI
CS
WP
HOLD
SCK
CAT25320
SO
VSS
Figure 1. Functional Symbol
www.onsemi.com
SOIC−8
V SUFFIX
CASE 751BD
UDFN−8
HU3 SUFFIX
CASE 517AX
TDFN−8*
VP2 SUFFIX
CASE 511AK
PDIP−8
L SUFFIX
CASE 646AA
TSSOP−8
Y SUFFIX
CASE 948AL
PIN CONFIGURATION
CS 1
SO
VCC
HOLD
WP SCK
VSS SI
PDIP (L), SOIC (V), TSSOP (Y),
TDFN (VP2*), UDFN (HU3)
* Not recommended for new designs
Pin Name
CS
SO
WP
VSS
SI
SCK
HOLD
VCC
PIN FUNCTION
Function
Chip Select
Serial Data Output
Write Protect
Ground
Serial Data Input
Serial Clock
Hold Transmission Input
Power Supply
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 16 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
July, 2015 − Rev. 11
1
Publication Order Number:
CAT25320/D

1 page




CAT25320 pdf
CAT25320
Status Register
The Status Register, as shown in Table 8, contains a
number of status and control bits.
The RDY (Ready) bit indicates whether the device is busy
with a write operation. This bit is automatically set to 1 during
an internal write cycle, and reset to 0 when the device is ready
to accept commands. For the host, this bit is read only.
The WEL (Write Enable Latch) bit is set/reset by the
WREN/WRDI commands. When set to 1, the device is in a
Write Enable state and when set to 0, the device is in a Write
Disable state.
The BP0 and BP1 (Block Protect) bits determine which
blocks are currently write protected. They are set by the user
with the WRSR command and are non−volatile. The user is
allowed to protect a quarter, one half or the entire memory,
by setting these bits according to Table 9. The protected
blocks then become read−only.
The WPEN (Write Protect Enable) bit acts as an enable for
the WP pin. Hardware write protection is enabled when the
WP pin is low and the WPEN bit is 1. This condition
prevents writing to the status register and to the block
protected sections of memory. While hardware write
protection is active, only the non−block protected memory
can be written. Hardware write protection is disabled when
the WP pin is high or the WPEN bit is 0. The WPEN bit, WP
pin and WEL bit combine to either permit or inhibit Write
operations, as detailed in Table 10.
Table 8. STATUS REGISTER
76
WPEN
0
5
0
4 3 2 10
0
BP1
BP0
WEL
RDY
Table 9. BLOCK PROTECTION BITS
Status Register Bits
BP1 BP0
00
01
10
11
Array Address Protected
None
0C00−0FFF
0800−0FFF
0000−0FFF
Protection
No Protection
Quarter Array Protection
Half Array Protection
Full Array Protection
Table 10. WRITE PROTECT CONDITIONS
WPEN
WP
WEL
0X0
0X1
1 Low 0
1 Low 1
X High 0
X High 1
Protected Blocks
Protected
Protected
Protected
Protected
Protected
Protected
Unprotected Blocks
Protected
Writable
Protected
Writable
Protected
Writable
Status Register
Protected
Writable
Protected
Protected
Protected
Writable
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CAT25320 arduino
PIN # 1
IDENTIFICATION
D
TOP VIEW
CAT25320
PACKAGE DIMENSIONS
PDIP−8, 300 mils
CASE 646AA−01
ISSUE A
SYMBOL MIN
NOM
MAX
A 5.33
A1 0.38
A2 2.92 3.30 4.95
b 0.36 0.46 0.56
E1 b2 1.14 1.52 1.78
c 0.20 0.25 0.36
D 9.02 9.27 10.16
E 7.62 7.87 8.25
E1 6.10 6.35 7.11
e 2.54 BSC
eB 7.87
10.92
L 2.92 3.30 3.80
E
A2
A
A1
b2
L
c
e
SIDE VIEW
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC MS-001.
b
eB
END VIEW
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