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PDF 74LVC125A Data sheet ( Hoja de datos )

Número de pieza 74LVC125A
Descripción QUADRUPLE 3-STATE BUFFERS
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74LVC125A
QUADRUPLE 3-STATE BUFFERS
Description
The 74LVC125A provides four independent buffers with three state
outputs. Each output is independently controlled by an associated
output enable pin (OE) which places the device in the high
impedance state when driven high. The device is designed for
operation with a power supply range of 1.65V to 5.5V. The inputs are
tolerant to 5.5V allowing this device to be used in a mixed voltage
environment. The device is fully specified for partial power down
applications using IOFF. The IOFF circuitry disables the output
preventing damaging current backflow when the device is powered
down.
Pin Assignments
Features
Supply Voltage Range from 1.65V to 5.5V
Sinks 24mA at Vcc = 3.3V
CMOS low power consumption
IOFF Supports Partial-Power-Down Mode Operation
Inputs or outputs accept up to 5.5V
Inputs can be driven by 3.3V or 5.5V allowing for voltage
translation applications.
ESD Protection Exceeds JESD 22
ƒ 200-V Machine Model (A115-A)
ƒ 2000-V Human Body Model (A114-A)
ƒ Exceeds 1000-V Charged Device Model (C101C)
Latch-Up Exceeds 250mA per JESD 78, Class II
Range of Package Options SO-14 and TSSOP-14
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3) 
 
Applications
Voltage Level Shifting
General Purpose Logic
Power Down Signal Isolation
Wide array of products such as:
ƒ PCs, networking, notebooks, ultrabooks, netbooks
ƒ Computer peripherals, hard drives, CD/DVD ROM
ƒ TV, DVD, DVR, set top box
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
74LVC125A
Document number: DS35265 Rev. 3 - 2
1 of 10
www.diodes.com
July 2012
© Diodes Incorporated

1 page




74LVC125A pdf
74LVC125A
Switching Characteristics
Parameter
From To
(Input) (Output)
Test Conditions
See
Figure 1
VCC = 1.8V
± 0.15V
VCC = 2.5V
tpd A Y
± 0.2V
VCC = 2.7V
VCC = 3.3V
± 0.3V
VCC = 1.8V
± 0.15V
ten OE Y
VCC = 2.5V
± 0.2V
VCC = 2.7V
VCC = 3.3V
± 0.3V
VCC = 1.8V
± 0.15V
tdis OE Y
VCC = 2.5V
± 0.2V
VCC = 2.7V
VCC = 3.3V
± 0.3V
tSK(0)
VCC = 3.3V
± 0.3V
TA = +25°C
Min Typ Max
1.0 4.5 11.8
1.0 2.7 5.8
1.0 3.0 5.3
1.0 2.5 4.6
1.0 4.3 13.8
1.0 2.7 6.6
1.0 3.3 6.4
1.0 2.4 5.2
1.0 4.3 10.6
1.0 2.2 5.1
1.0 2.5 4.8
1.0 2.4 4.4
1.0
-40°C to +85°C
Min Max
1.0 12.3
1.0 6.3
1.0 5.5
1.0 4.8
1.0 14.3
1.0 7.4
1.0 6.6
1.0 5.4
1.0 11.1
1.0 5.6
1.0 5.0
1.0 4.6
1.0
-40°C to +125°C
Unit
Min Max
1.0 13.8
1.0 8.4
ns
1.0 7.0
1.0 6.0
1.0 15.8
1.0 9.5
ns
1.0 8.5
1.0 7.0
1.0 12.6
1.0 7.7
ns
1.0 6.5
1.0 6.0
1.5 ns
Operating Characteristics (@TA = +25°C, unless otherwise specified.)
Parameter
Test
Conditions
Cpd
Power dissipation
f = 10 MHz
capacitance per gate
CI
Input Capacitance
Vi = VCC – or
GND
VCC = 1.8V
Typ
7.3
4
VCC = 2.5V
Typ
11.2
4
VCC = 3.3V
Typ
14.9
4
Unit
pF
pF
Package Characteristics
Symbol
θJA
Parameter
Thermal Resistance
Junction-to-Ambient
Test Conditions
SO-14
TSSOP-14
VCC
(Note 6)
Min Typ Max Unit
TBD
159
oC/W
θJC
Thermal Resistance
Junction-to-Case
SO-14
TSSOP-14
(Note 6)
TBD
25
oC/W
Note:
6. Test condition for SO-14 and TSSOP-14: Device mounted on FR-4 substrate PC board, 2oz copper, with minimum recommended pad layout.
74LVC125A
Document number: DS35265 Rev. 3 - 2
5 of 10
www.diodes.com
July 2012
© Diodes Incorporated

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