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PDF 74LV08 Data sheet ( Hoja de datos )

Número de pieza 74LV08
Descripción Quad 2-input AND gate
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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74LV08
Quad 2-input AND gate
Rev. 03 — 6 April 2009
Product data sheet
1. General description
The 74LV08 is a low-voltage Si-gate CMOS device that is pin and function compatible with
74HC08 and 74HCT08.
The 74LV08 provides a quad 2-input AND function.
2. Features
I Wide operating voltage: 1.0 V to 5.5 V
I Optimized for low voltage applications: 1.0 V to 3.6 V
I Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
I Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
I Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
Tamb = 25 °C
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
I Multiple package options
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
74LV08N
40 °C to +125 °C DIP14
74LV08D
40 °C to +125 °C SO14
74LV08DB
40 °C to +125 °C SSOP14
74LV08PW
40 °C to +125 °C TSSOP14
Description
plastic dual in-line package; 14 leads (300 mil)
plastic small outline package; 14 leads;
body width 3.9 mm
plastic shrink small outline package; 14 leads;
body width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT27-1
SOT108-1
SOT337-1
SOT402-1

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74LV08 pdf
NXP Semiconductors
74LV08
Quad 2-input AND gate
Table 6. Static characteristics …continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
VOL
II
ICC
ICC
CI
LOW-level output voltage
input leakage current
supply current
additional supply current
input capacitance
VI = VIH or VIL
IO = 100 µA; VCC = 1.2 V
IO = 100 µA; VCC = 2.0 V
IO = 100 µA; VCC = 2.7 V
IO = 100 µA; VCC = 3.0 V
IO = 100 µA; VCC = 4.5 V
IO = 6 mA; VCC = 3.0 V
IO = 12 mA; VCC = 4.5 V
VI = VCC or GND; VCC = 5.5 V
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
per input; VI = VCC 0.6 V;
VCC = 2.7 V to 3.6 V
[1] Typical values are measured at Tamb = 25 °C.
10. Dynamic characteristics
40 °C to +85 °C
Min Typ[1] Max
40 °C to +125 °C Unit
Min Max
- 0 - - -V
- 0 0.2 - 0.2 V
- 0 0.2 - 0.2 V
- 0 0.2 - 0.2 V
- 0 0.2 - 0.2 V
- 0.25 0.40 - 0.50 V
- 0.35 0.55 - 0.65 V
- - 1.0 - 1.0 µA
- - 20.0 -
40 µA
- - 500 - 850 µA
- 3.5 - - - pF
Table 7. Dynamic characteristics
GND = 0 V; For test circuit see Figure 7.
Symbol Parameter
Conditions
40 °C to +85 °C
Min Typ[1] Max
tpd propagation delay nA, nB to nY; see Figure 6
[2]
VCC = 1.2 V
- 45 -
VCC = 2.0 V
- 15 26
VCC = 2.7 V
VCC = 3.0 V to 3.6 V; CL = 15 pF
VCC = 3.0 V to 3.6 V
[3]
[3]
-
-
-
11 17
7-
9.0 15
VCC = 4.5 V to 5.5 V
CPD power dissipation CL = 50 pF; fi = 1 MHz;
capacitance
VI = GND to VCC
-
[4] -
- 11
10 -
[1] All typical values are measured at Tamb = 25 °C.
[2] tpd is the same as tPLH and tPHL.
[3] Typical values are measured at nominal supply voltage (VCC = 3.3 V).
[4] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz, fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
Σ(CL × VCC2 × fo) = sum of the outputs.
74LV08_3
Product data sheet
Rev. 03 — 6 April 2009
40 °C to +125 °C Unit
Min Max
- - ns
- 33 ns
- 21 ns
- - ns
- 19 ns
- 14 ns
- - pF
© NXP B.V. 2009. All rights reserved.
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74LV08 arduino
NXP Semiconductors
74LV08
Quad 2-input AND gate
13. Abbreviations
Table 10. Abbreviations
Acronym
Description
CMOS
Complementary Metal Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
14. Revision history
Table 11. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74LV08_3
Modifications:
20090406
Product data sheet
-
74LV08_2
The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors.
Legal texts have been adapted to the new company name when appropriate.
74LV08_2
19980420
Product specification -
74LV08_1
74LV08_1
19970203
Product specification -
-
74LV08_3
Product data sheet
Rev. 03 — 6 April 2009
© NXP B.V. 2009. All rights reserved.
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