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PDF FT221XQ-x Data sheet ( Hoja de datos )
| Número de pieza | FT221XQ-x | |
| Descripción | USB 8-Bit SPI | |
| Fabricantes | FTDI | |
| Logotipo |  |
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FT221X USB 8-BIT SPI/FT1248 IC Datasheet
Version 1.3
Document No.: FT_000630 Clearance No.: FTDI# 263
Future Technology Devices
International Ltd.
FT221X
(USB 8-Bit SPI/FT1248 IC)
The FT221X is a USB to FTDI’s
proprietary FT1248 interface with the
following advanced features:
Single chip USB to 1, 2, 4, or 8 bit wide
synchronous interface.
Similar to an SPI Slave with variable bus width.
Entire USB protocol handled on the chip. No
USB specific firmware programming required.
Fully integrated 2048 byte multi-time-
programmable (MTP) memory, storing device
descriptors and CBUS I/O configuration.
Fully integrated clock generation with no
external crystal required plus optional clock
output selection enabling a glue-less interface
to external MCU or FPGA.
Data transfer rates to 1MByte/s.
512 byte receive buffer and 512 byte transmit
buffer utilising buffer smoothing technology to
allow for high data throughput.
FTDI’s royalty-free Virtual Com Port (VCP) and
Direct (D2XX) drivers eliminate the
requirement for USB driver development in
most cases.
Configurable CBUS I/O pin.
USB Battery Charger Detection. Allows for USB
peripheral devices to detect the presence of a
higher power source to enable improved
charging.
Device supplied pre-programmed with unique
USB serial number.
USB Power Configurations; supports bus-
powered, self-powered and bus-powered with
power switching.
Integrated +3.3V level converter for USB I/O.
True 3.3V CMOS drive output and TTL input;
operates down to 1V8 with external pull-ups.
Tolerant of 5V inputs.
Configurable I/O pin output drive strength; 4
mA(min) and 16 mA(max)
Integrated power-on-reset circuit.
Fully integrated AVCC supply filtering - no
external filtering required.
+ 5V Single Supply Operation.
Internal 3V3/1V8 LDO regulators
Low operating and USB suspend current; 8mA
(active-typ) and 125uA (suspend-typ).
Low USB bandwidth consumption.
UHCI/OHCI/EHCI host controller compatible.
USB 2.0 Full Speed capable.
Extended operating temperature range; -40 to
85⁰C.
Available in compact Pb-free 20 Pin SSOP and
QFN packages (both RoHS compliant).
Neither the whole nor any part of the information contained in, or the product described in this manual, may be adapted or reproduced
in any material or electronic form without the prior written consent of the copyright holder. This product and its documentation are
supplied on an as-is basis and no warranty as to their suitability for any particular purpose is either made or implied. Future Technology
Devices International Ltd will not accept any claim for damages howsoever arising as a result of use or failure of this product. Your
statutory rights are not affected. This product or any variant of it is not intended for use in any medical appliance, device or system in
which the failure of the product might reasonably be expected to result in personal injury. This document provides preliminary
information that may be subject to change without notice. No freedom to use patents or other intellectual property rights is implied by
the publication of this document. Future Technology Devices International Ltd, Unit 1, 2 Seaward Place, Centurion Business Park, Glasgow
G41 1HH United Kingdom. Scotland Registered Company Number: SC136640
Copyright © 2013 Future Technology Devices International Limited
1
1 page  
Table of Contents
FT221X USB 8-BIT SPI/FT1248 IC Datasheet
Version 1.3
Document No.: FT_000630 Clearance No.: FTDI# 263
1 Typical Applications...................................................................... 2
1.1 Driver Support .................................................................................... 2
1.2 Part Numbers...................................................................................... 2
1.3 USB Compliant .................................................................................... 3
2 FT221X Block Diagram ................................................................. 4
3 Device Pin Out and Signal Description .......................................... 7
3.1 20-LD QFN Package ........................................................................... 7
3.1.1 QFN Package PinOut Description .................................................................................... 7
3.2 20-LD SSOP Package.......................................................................... 9
3.2.1 SSOP Package PinOut Description .................................................................................. 9
3.3 CBUS Signal Options ......................................................................... 11
4 Function Description................................................................... 12
4.1 Key Features..................................................................................... 12
4.2 Functional Block Descriptions ........................................................... 12
5 FT1248 Interface Description. .................................................... 14
5.1 Determining the Dynamic Bus Width ................................................ 14
5.2 Supported Commands on the FT1248 Interface ................................ 15
5.3 LSB or MSB Selection ........................................................................ 16
5.4 Clock Phase/Polarity ........................................................................ 16
5.4.1 CPHA = 1 ................................................................................................................. 17
5.5 FT1248 Timing .................................................................................. 18
6 Devices Characteristics and Ratings ........................................... 20
6.1 Absolute Maximum Ratings............................................................... 20
6.2 ESD and Latch-up Specifications ....................................................... 20
6.3 DC Characteristics............................................................................. 21
6.4 MTP Memory Reliability Characteristics ............................................ 25
6.5 Internal Clock Characteristics........................................................... 25
7 USB Power Configurations.......................................................... 26
7.1 USB Bus Powered Configuration ...................................................... 26
7.2 Self Powered Configuration .............................................................. 27
7.3 USB Bus Powered with Power Switching Configuration .................... 28
7.4 USB Battery Charging Detection ....................................................... 29
8 Application Examples ................................................................. 30
8.1 USB to FT1248 Converter.................................................................. 30
9 Internal MTP Memory Configuration ........................................... 33
Copyright © 2013 Future Technology Devices International Limited
5
5 Page 
3.3 CBUS Signal Options
FT221X USB 8-BIT SPI/FT1248 IC Datasheet
Version 1.3
Document No.: FT_000630 Clearance No.: FTDI# 263
The following options can be configured on the CBUS I/O pin. CBUS signal options are common to both
package versions of the FT221X. These options can be configured in the internal MTP memory using the
software utility FT_PROG, which can be downloaded from the FTDI Utilities (www.ftdichip.com). The
default configuration is described in Section 9.
CBUS Signal
Option
Available On CBUS Pin
Description
TRI-STATE
CBUS3
IO Pad is tri-stated
DRIVE 1
CBUS3
Output a constant 1
DRIVE 0
CBUS3
Output a constant 0
PWREN#
CBUS3
Output is low after the device has been configured by
USB, then high during USB suspend mode. This output
can be used to control power to external logic P-Channel
logic level MOSFET switch. Enable the interface pull-
down option when using the PWREN# in this way.
SLEEP#
CBUS3
Goes low during USB suspend mode. Typically used to
power down external logic.
CLK24MHz
CBUS3
24 MHz Clock output.*
CLK12MHz
CBUS3
12 MHz Clock output.*
CLK6MHz
CBUS3
6 MHz Clock output.*
GPIO
CBUS3
CBUS bit bang mode option. Allows the CBUS pin to be
used as general purpose I/O. Configured in the internal
MTP memory. A separate application note, AN232R-01,
available from FTDI website (www.ftdichip.com)
describes in more detail how to use CBUS bit bang
mode.
BCD Charger
CBUS3
Battery charge Detect, indicates when the device is
connected to a dedicated battery charger host. Active
high output.
BCD Charger#
CBUS3
Inverse of BCD Charger
BitBang_WR#
CBUS3
Synchronous and asynchronous bit bang mode WR#
strobe output.
BitBang_RD#
CBUS3
Synchronous and asynchronous bit bang mode RD#
strobe output.
VBUS Sense
CBUS3
Input to detect when VBUS is present.
Time Stamp
CBUS3
Toggle signal which changes state each time a USB SOF
is received
Keep_Awake#
CBUS3
Prevents the device from entering suspend state when
unplugged.
Table 3.7 CBUS Configuration Control
*When in USB suspend mode the outputs clocks are also suspended.
Copyright © 2013 Future Technology Devices International Limited
11
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