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PDF KSZ9031MNX Data sheet ( Hoja de datos )
| Número de pieza | KSZ9031MNX | |
| Descripción | Gigabit Ethernet Transceiver | |
| Fabricantes | Micrel Semiconductor | |
| Logotipo |  |
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KSZ9031MNX
Gigabit Ethernet Transceiver
with GMII / MII Support
Data Sheet Rev. 0.13
General Description
The KSZ9031MNX is a completely integrated triple speed
(10Base-T/100Base-TX/1000Base-T) Ethernet Physical
Layer Transceiver for transmission and reception of data
on standard CAT-5 unshielded twisted pair (UTP) cable.
The KSZ9031MNX offers the industry standard GMII/MII
(Gigabit Media Independent Interface / Media Independent
Interface) for connection to GMII/MII MACs in Gigabit
Ethernet Processors and Switches for data transfer at
1000 Mbps or 10/100 Mbps speed.
The KSZ9031MNX reduces board cost and simplifies
board layout by using on-chip termination resistors for the
four differential pairs and by integrating an LDO controller
to drive a low cost MOSFET to supply the 1.2V core.
The KSZ9031MNX offers diagnostic features to facilitate
system bring-up and debugging in production testing and
in product deployment. Parametric NAND tree support
enables fault detection between KSZ9031MNX I/Os and
board. LinkMD® TDR-based cable diagnostic provides
identification of faulty copper cabling. Remote and local
loopback functions provide verification of analog and
digital data paths.
The KSZ9031MNX is available in a 64-pin, lead-free QFN
package (See Ordering Information).
Features
• Single-chip 10/100/1000 Mbps IEEE 802.3 compliant
Ethernet Transceiver
• GMII / MII standard interface with 3.3V/2.5V/1.8V
tolerant I/Os
• Auto-Negotiation to automatically select the highest link
up speed (10/100/100 Mbps) and duplex (half/full)
• On-chip termination resistors for the differential pairs
• On-chip LDO controller to support single 3.3V supply
operation – requires only external FET to generate 1.2V
for the core
• Jumbo frame support up to 16KB
• 125 MHz Reference Clock Output
• Energy Detect Power Down Mode for reduced power
consumption when cable not attached
• Energy Efficient Ethernet (EEE) support with Low
Power Idle (LPI) mode and clock stoppage for
100Base-TX/1000Base-T and transmit amplitude
reduction with 10Base-Te option
• Wake On LAN (WOL) support with robust custom
packet detection
____________________________________________________________________________________________________________
Functional Diagram
LinkMD is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
August 2012
M9999-081712-0.13
1 page  
Micrel, Inc.
KSZ9031MNX
Contents
General Description ........................................................................................................................................................... 1
Features .............................................................................................................................................................................. 1
More Features..................................................................................................................................................................... 2
Applications........................................................................................................................................................................ 2
Ordering Information ......................................................................................................................................................... 2
Revision History................................................................................................................................................................. 3
Contents.............................................................................................................................................................................. 5
List of Figures..................................................................................................................................................................... 7
List of Tables ...................................................................................................................................................................... 8
Pin Configuration ............................................................................................................................................................... 9
Pin Description ................................................................................................................................................................. 10
Strapping Options............................................................................................................................................................ 16
Functional Overview ........................................................................................................................................................ 17
Functional Description: 10Base-T/100Base-TX Transceiver ...................................................................................... 18
100Base-TX Transmit....................................................................................................................................................18
100Base-TX Receive.....................................................................................................................................................18
Scrambler/De-Scrambler (100Base-TX only) ................................................................................................................18
10Base-T Transmit ........................................................................................................................................................18
10Base-T Receive .........................................................................................................................................................18
Functional Description: 1000Base-T Transceiver ....................................................................................................... 19
Analog Echo Cancellation Circuit ..................................................................................................................................19
Automatic Gain Control (AGC) ......................................................................................................................................19
Analog-to-Digital Converter (ADC) ................................................................................................................................19
Timing Recovery Circuit.................................................................................................................................................20
Adaptive Equalizer.........................................................................................................................................................20
Trellis Encoder and Decoder .........................................................................................................................................20
Functional Description: Additional 10/100/1000 PHY Features.................................................................................. 20
Auto MDI/MDI-X.............................................................................................................................................................20
Pair- Swap, Alignment, and Polarity Check...................................................................................................................21
Wave Shaping, Slew Rate Control and Partial Response.............................................................................................21
PLL Clock Synthesizer...................................................................................................................................................21
Auto-Negotiation .............................................................................................................................................................. 21
GMII Interface.................................................................................................................................................................... 23
GMII Signal Definition ....................................................................................................................................................24
GMII Signal Diagram .....................................................................................................................................................24
MII Interface ...................................................................................................................................................................... 25
MII Signal Definition.......................................................................................................................................................26
MII Signal Diagram ........................................................................................................................................................26
MII Management (MIIM) Interface.................................................................................................................................... 27
Interrupt (INT_N)............................................................................................................................................................... 27
LED Mode.......................................................................................................................................................................... 28
Single LED Mode...........................................................................................................................................................28
Tri-color Dual LED Mode ...............................................................................................................................................28
Loopback Mode ................................................................................................................................................................ 29
Local (Digital) Loopback ................................................................................................................................................29
Remote (Analog) Loopback ...........................................................................................................................................30
LinkMD® Cable Diagnostic .............................................................................................................................................. 31
August 2012
5 M9999-081712-0.13
5 Page 
Micrel, Inc.
Pin Number
12
13
14
Pin Name
AVDDL
AVDDL
TXRXP_D
15 TXRXM_D
16 AVDDH
17 LED2 /
PHYAD1
18 DVDDH
19 LED1 /
PHYAD0 /
KSZ9031MNX
Type(1)
P
P
I/O
I/O
P
I/O
Pin Function
1.2V analog VDD
1.2V analog VDD
Media Dependent Interface[3], positive signal of differential pair
1000Base-T Mode:
TXRXP_D corresponds to BI_DD+ for MDI configuration and BI_DC+ for
MDI-X configuration, respectively.
10Base-T / 100Base-TX Mode:
TXRXP_D is not used.
Media Dependent Interface[3], negative signal of differential pair
1000Base-T Mode:
TXRXM_D corresponds to BI_DD- for MDI configuration and BI_DC- for
MDI-X configuration, respectively.
10Base-T / 100Base-TX Mode:
TXRXM_D is not used.
3.3V / 2.5V (commercial temp only) analog VDD
LED2 Output: Programmable LED2 Output /
Config Mode:
The voltage on this pin is sampled and latched during the
power-up / reset process to determine the value of PHYAD[1].
See the “Strapping Options” section for details.
The LED2 pin is programmed by the LED_MODE strapping option (pin 55, and is
defined as follows:
Single LED Mode
Link
Link off
Link on (any speed)
Pin State
H
L
LED Definition
OFF
ON
Tri-color Dual LED Mode
Link / Activity
Link off
1000 Link / No Activity
1000 Link / Activity (RX, TX)
100 Link / No Activity
100 Link / Activity (RX, TX)
10 Link / No Activity
10 Link / Activity (RX, TX)
Pin State
LED2 LED1
HH
LH
Toggle H
HL
H Toggle
LL
Toggle Toggle
LED Definition
LED2 LED1
OFF
OFF
ON OFF
Blinking OFF
OFF
ON
OFF
Blinking
ON ON
Blinking Blinking
For Tri-color Dual LED Mode, LED2 works in conjunction with LED1 (pin 19 to
indicate 10 Mbps Link and Activity.
P 3.3V, 2.5V, or 1.8V digital VDD
I/O LED1 Output: Programmable LED1 Output /
Config Mode:
The voltage on this pin is sampled and latched during the power-
up / reset process to determine the value of PHYAD[0]. See the
“Strapping Options” section for details.
August 2012
11 M9999-081712-0.13
11 Page | ||
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| PDF Descargar | [ Datasheet KSZ9031MNX.PDF ] | |
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