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PDF KSZ8051MNLU Data sheet ( Hoja de datos )
| Número de pieza | KSZ8051MNLU | |
| Descripción | 10Base-T/100Base-TX Physical Layer Transceiver | |
| Fabricantes | Micrel Semiconductor | |
| Logotipo |  |
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KSZ8051MNLU/KSZ8051RNLU
10Base-T/100Base-TX
Physical Layer Transceiver
Data Sheet Rev. 1.0
General Description
The KSZ8051 is an AEC-Q100 standard qualified single-
supply 10Base-T/100Base-TX Ethernet physical-layer
transceiver for transmission and reception of data over
standard CAT-5 unshielded twisted pair (UTP) cable for
automotive applications.
The KSZ8051 is a highly-integrated PHY solution. It reduces
board cost and simplifies board layout by using on-chip
termination resistors for the differential pairs and by
integrating a low-noise regulator to supply the 1.2V core.
The KSZ8051MNLU offers the Media Independent Interface
(MII) and the KSZ8051RNLU offers the Reduced Media
Independent Interface (RMII) for direct connection with
MII/RMII-compliant Ethernet MAC processors and switches.
A 25MHz crystal is used to generate all required clocks,
including the 50MHz RMII reference clock output for the
KSZ8051RNLU.
The KSZ8051 provides diagnostic features to facilitate
system bring-up and debugging in production testing and
in product deployment. Parametric NAND tree support
enables fault detection between KSZ8051 I/Os and the
board. Micrel LinkMD® TDR-based cable diagnostics
identify faulty copper cabling.
The KSZ8051MNLU and KSZ8051RNLU are available in
32-pin, lead-free QFN packages (see “Ordering
Information”).
Data sheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
Features
• Single-chip 10Base-T/100Base-TX IEEE 802.3
compliant Ethernet transceiver
• AEC-Q100 qualified for automotive applications
• MII interface support (KSZ8051MNLU)
• RMII v1.2 Interface support with a 50MHz reference
clock output to MAC, and an option to input a 50MHz
reference clock (KSZ8051RNLU)
• Back-to-back mode support for a 100Mbps copper
repeater
• MDC/MDIO management interface for PHY register
configuration
• Programmable interrupt output
• LED outputs for link, activity, and speed status indication
• On-chip termination resistors for the differential pairs
• Baseline wander correction
• HP Auto MDI/MDI-X to reliably detect and correct
straight-through and crossover cable connections with
disable and enable option
• Auto-negotiation to automatically select the highest link-
up speed (10/100Mbps) and duplex (half/full)
• Power-down and power-saving modes
• LinkMD TDR-based cable diagnostics to identify faulty
copper cabling
• Parametric NAND Tree support for fault detection
between chip I/Os and the board
Functional Diagram
LinkMD is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
February, 17 2013
Revision 1.0
1 page  
Micrel, Inc.
KSZ8051MNLU/KSZ8051RNLU
Crossover Cable.................................................................................................................................................................................. 29
Loopback Mode..................................................................................................................................................................... 30
Local (Digital) Loopback ...................................................................................................................................................................... 30
Remote (Analog) Loopback................................................................................................................................................................. 30
LinkMD® Cable Diagnostic .................................................................................................................................................... 31
NAND Tree Support .............................................................................................................................................................. 31
NAND Tree I/O Testing ....................................................................................................................................................................... 33
Power Management .............................................................................................................................................................. 34
Power-Saving Mode ............................................................................................................................................................................ 34
Energy-Detect Power-Down Mode ...................................................................................................................................................... 34
Power-Down Mode .............................................................................................................................................................................. 34
Slow-Oscillator Mode........................................................................................................................................................................... 34
Reference Circuit for Power and Ground Connections......................................................................................................... 35
Typical Current/Power Consumption .................................................................................................................................... 36
Transceiver (3.3V), Digital I/Os (3.3V)................................................................................................................................................. 36
Transceiver (3.3V), Digital I/Os (2.5V)................................................................................................................................................. 36
Transceiver (3.3V), Digital I/Os (1.8V)................................................................................................................................................. 37
Register Map ......................................................................................................................................................................... 38
Register Description .............................................................................................................................................................. 39
Absolute Maximum Ratings(1)................................................................................................................................................ 48
Operating Ratings(2) .............................................................................................................................................................. 48
Electrical Characteristics(3) .................................................................................................................................................... 48
Timing Diagrams ................................................................................................................................................................... 50
MII SQE Timing (10Base-T) ................................................................................................................................................................ 50
MII Transmit Timing (10Base-T) .......................................................................................................................................................... 51
MII Receive Timing (10Base-T) ........................................................................................................................................................... 52
MII Transmit Timing (100Base-TX)...................................................................................................................................................... 53
MII Receive Timing (100Base-TX)....................................................................................................................................................... 54
RMII Timing ......................................................................................................................................................................................... 55
Auto-Negotiation Timing ...................................................................................................................................................................... 56
MDC/MDIO Timing .............................................................................................................................................................................. 57
Power-Up/Reset Timing ...................................................................................................................................................................... 58
Reset Circuit.......................................................................................................................................................................... 59
Reference Circuits – LED Strap-In Pins................................................................................................................................ 60
Reference Clock – Connection and Selection ...................................................................................................................... 61
Magnetics – Connection and Selection................................................................................................................................. 62
Recommended Land Pattern ................................................................................................................................................ 64
Package Information(1) .......................................................................................................................................................... 65
February 17, 2013
5
Revision 1.0
5 Page 
Micrel, Inc.
KSZ8051MNLU/KSZ8051RNLU
Pin Number
31
Pin Name
LED1/
SPEED
Type(1)
Ipu/O
Pin Function
LED output:
Programmable LED1 output
Config mode: Latched as Speed (register 0h, bit [13]) at the de-assertion of
reset.
See the “Strapping Options” section for details.
The LED1 pin is programmable using register 1Fh bits [5:4], and is defined as
follows.
LED mode = [00]
Speed
Pin State
10Base-T
High
100Base-TX
Low
LED Definition
OFF
ON
LED mode = [01]
Activity
Pin State
No activity
High
Activity
Toggle
LED Definition
OFF
Blinking
LED mode = [10], [11] Reserved
32 RST#
Ipu Chip reset (active low)
PADDLE
GND
Gnd Ground
Notes:
1. P = Power supply.
Gnd = Ground.
I = Input.
O = Output.
I/O = Bi-directional.
Ipu = Input with internal pull-up (see “Electrical Characteristics” for value).
Ipu/O = Input with internal pull-up (see “Electrical Characteristics” for value) during power-up/reset; output pin otherwise.
Ipd/O = Input with internal pull-down (see “Electrical Characteristics” for value) during power-up/reset; output pin otherwise.
Ipu/Opu = Input with internal pull-up (see “Electrical Characteristics” for value) and output with internal pull-up (see “Electrical Characteristics” for
value).
2. MII RX Mode: The RXD[3:0] bits are synchronous with RXC. When RXDV is asserted, RXD[3:0] presents valid data to the MAC. RXD[3:0] is invalid
data from the PHY when RXDV is de-asserted.
3. MII TX Mode: The TXD[3:0] bits are synchronous with TXC. When TXEN is asserted, TXD[3:0] presents valid data from the MAC. TXD[3:0] has no
effect on the PHY when TXEN is de-asserted.
February 17, 2013
11
Revision 1.0
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet KSZ8051MNLU.PDF ] | |
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