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PDF TC74AC151FN Data sheet ( Hoja de datos )

Número de pieza TC74AC151FN
Descripción 8-CHANNEL MULTIPLEXER
Fabricantes Toshiba Semiconductor 
Logotipo Toshiba Semiconductor Logotipo



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TC74AC151P/F/FN
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74AC151P,TC74AC151F,TC74AC151FN
8-Channel Multiplexer
The TC74AC151 is an advanced high speed CMOS
8-CHANNEL MULTIPLEXER fabricated with silicon gate and
double-layer metal wiring C2MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
One of eight date input signals (D0-D7) is selected by decoding
of the three-bit address input (A, B, C). The selected data appears
on two outputs: non-inverting (Y) and inverting (W).
The STROBE input provides two output conditions; a low
level on the STROBE input transferrs the selected data to the
outputs. A high level on the STROBE input sets the Y output
low and the W output high without regard to the data or select
input conditions.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
High speed: tpd = 5.3 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 8 μA (max) at Ta = 25°C
High noise immunity: VNIH = VNIL = 28% VCC (min)
Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
Capability of driving 50 Ω
transmission lines.
Balanced propagation delays: tpLH ∼− tpHL
Wide operating voltage range: VCC (opr) = 2 to 5.5 V
Pin and function compatible with 74F151
Pin Assignment
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74AC151P
TC74AC151F
TC74AC151FN
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
SOL16-P-150-1.27
: 1.00 g (typ.)
: 0.18 g (typ.)
: 0.13 g (typ.)
1 2007-10-01

1 page




TC74AC151FN pdf
TC74AC151P/F/FN
AC Characteristics (CL = 50 pF, RL = 500 Ω, input: tr = tf = 3 ns)
Characteristics
Propagation delay
time
(D-Y, W)
Propagation delay
time
(A, B, C-Y, W)
Propagation delay
time
( ST -Y, W)
Input capacitance
Power dissipation
capacitance
Symbol
tpLH
tpHL
tpLH
tpHL
tpLH
tpHL
CIN
CPD
(Note)
Test Condition
VCC (V)
3.3 ± 0.3
5.0 ± 0.5
Ta = 25°C
Min Typ. Max
10.7 19.3
6.6 10.5
3.3 ± 0.3 13.3 23.7
5.0 ± 0.5
8.2 13.0
3.3 ± 0.3
5.0 ± 0.5
8.6 15.3
5.6 9.6
5 10
⎯ ⎯ 68
Ta = −40 to
85°C
Min Max
1.0 22.0
1.0 12.0
1.0 27.0
1.0 14.8
1.0 18.0
1.0 11.0
10
⎯⎯
Unit
ns
ns
ns
pF
pF
Note:
CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPDVCCfIN + ICC
5 2007-10-01

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