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PDF C8051F701 Data sheet ( Hoja de datos )

Número de pieza C8051F701
Descripción Mixed Signal ISP Flash MCU Family
Fabricantes Silicon Laboratories 
Logotipo Silicon Laboratories Logotipo



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No Preview Available ! C8051F701 Hoja de datos, Descripción, Manual

Capacitance to Digital Converter
- Supports buttons, sliders, wheels, capacitive prox-
imity, and touch screen sensing
- Up to 38 input channels
- Fast 40 µs per channel conversion time
- 12, 13, 14, or 16-bit output
- Auto-scan and wake-on-touch
- Auto-accumulate 4, 8, 16, 32, or 64 samples
10-Bit Analog to Digital Converter
- Up to 500 ksps
- Up to 16 external single-ended inputs
- VREF from on-chip VREF, external pin or VDD
- Internal or external start of conversion source
- Built-in temperature sensor
Analog Comparator
- Programmable hysteresis and response time
- Configurable as interrupt or reset source
On-Chip Debug
- On-chip debug circuitry facilitates full speed, non-
intrusive in-system debug (no emulator required)
- Provides breakpoints, single stepping,
inspect/modify memory and registers
- Superior performance to emulation systems using
ICE-chips, target pods, and sockets
- Low cost, complete development kit
Supply Voltage 1.8 to 3.6 V
- Built-in voltage supply monitor
C8051F70x/71x
Mixed Signal ISP Flash MCU Family
High-Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
instructions in 1 or 2 system clocks
- Up to 25 MIPS throughput with 25 MHz clock
- Expanded interrupt handler
Memory
- 512 bytes internal data RAM (256 + 256)
- Up to 16 kB Flash; In-system programmable in 512-
byte Sectors
- Up to 32-byte data EEPROM
Digital Peripherals
- Up to 54 Port I/O with high sink current
- Hardware enhanced UART, SMBus™ (I2C compati-
ble), and enhanced SPI™ serial ports
- Four general purpose 16-bit counter/timers
- 16-Bit programmable counter array (PCA) with 3
capture/compare modules and enhanced PWM
functionality
- Real time clock mode using timer and crystal
Clock Sources
- 24.5 MHz ±2% Oscillator Supports crystal-less
UART operation
- External oscillator: Crystal, RC, C, or clock
(1 or 2 pin modes)
- Can switch between clock sources on-the-fly; useful
in power saving modes
64-Pin TQFP, 48-Pin TQFP, 48-Pin QFN,
32-Pin QFN, 24-Pin QFN
Temperature Range: –40 to +85 °C
ANALOG
PERIPHERALS
A
M
U
10-bit TEMP
500 ksps SENSOR
X ADC
+
Capacitive
Sense
VOLTAGE
COMPARATOR
DIGITAL I/O
UART
Port 0
SMBus
Port 1
SPI
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Port 2
Port 3
Port 4
Port 5
Port 6.0
– 6.5
24.5 MHz PRECISION INTERNAL OSCILLATOR
HIGH-SPEED CONTROLLER CORE
16 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
DEBUG
CIRCUITRY
512 B RAM
32 B EEPROM
POR WDT
Rev. 1.0 7/10
Copyright © 2010 by Silicon Laboratories
C8051F70x/71x

1 page




C8051F701 pdf
C8051F70x/71x
22.1.2. Flash Erase Procedure ......................................................................... 148
22.1.3. Flash Write Procedure .......................................................................... 149
22.2. Non-volatile Data Storage ............................................................................. 149
22.3. Security Options ............................................................................................ 149
22.4. Flash Write and Erase Guidelines ................................................................. 150
22.4.1. VDD Maintenance and the VDD Monitor .............................................. 151
22.4.2. PSWE Maintenance .............................................................................. 151
22.4.3. System Clock ........................................................................................ 152
23. EEPROM ............................................................................................................... 155
23.1. RAM Reads and Writes ................................................................................. 155
23.2. Auto Increment .............................................................................................. 155
23.3. Interfacing with the EEPROM........................................................................ 155
23.4. EEPROM Security ......................................................................................... 156
24. Power Management Modes................................................................................. 160
24.1. Idle Mode....................................................................................................... 160
24.2. Stop Mode ..................................................................................................... 161
24.3. Suspend Mode .............................................................................................. 161
25. Reset Sources ...................................................................................................... 163
25.1. Power-On Reset ............................................................................................ 164
25.2. Power-Fail Reset / VDD Monitor ................................................................... 165
25.3. External Reset ............................................................................................... 166
25.4. Missing Clock Detector Reset ....................................................................... 166
25.5. Comparator0 Reset ....................................................................................... 167
25.6. Watchdog Timer Reset.................................................................................. 167
25.7. Flash Error Reset .......................................................................................... 167
25.8. Software Reset .............................................................................................. 167
26. Watchdog Timer................................................................................................... 169
26.1. Enable/Reset WDT........................................................................................ 169
26.2. Disable WDT ................................................................................................. 169
26.3. Disable WDT Lockout.................................................................................... 169
26.4. Setting WDT Interval ..................................................................................... 169
27. Oscillators and Clock Selection ......................................................................... 171
27.1. System Clock Selection................................................................................. 171
27.2. Programmable Internal High-Frequency (H-F) Oscillator .............................. 173
27.3. External Oscillator Drive Circuit..................................................................... 175
27.3.1. External Crystal Example...................................................................... 177
27.3.2. External RC Example............................................................................ 178
27.3.3. External Capacitor Example.................................................................. 179
28. Port Input/Output ................................................................................................. 180
28.1. Port I/O Modes of Operation.......................................................................... 181
28.1.1. Port Pins Configured for Analog I/O...................................................... 181
28.1.2. Port Pins Configured For Digital I/O...................................................... 181
28.1.3. Interfacing Port I/O to 5 V Logic ............................................................ 182
28.1.4. Increasing Port I/O Drive Strength ........................................................ 182
28.2. Assigning Port I/O Pins to Analog and Digital Functions............................... 182
Rev. 1.0
5

5 Page





C8051F701 arduino
C8051F70x/71x
List of Tables
Table 2.1. Product Selection Guide ......................................................................... 27
Table 3.1. Pin Definitions for the C8051F70x/71x ................................................... 28
Table 4.1. TQFP-64 Package Dimensions .............................................................. 37
Table 4.2. TQFP-64 PCB Land Pattern Dimensions ............................................... 38
Table 5.1. TQFP-48 Package Dimensions .............................................................. 39
Table 5.2. TQFP-48 PCB Land Pattern Dimensions ............................................... 40
Table 6.1. QFN-48 Package Dimensions ................................................................ 41
Table 6.2. QFN-48 PCB Land Pattern Dimensions ................................................. 42
Table 7.1. QFN-32 Package Dimensions ................................................................ 43
Table 7.2. QFN-32 PCB Land Pattern Dimensions ................................................. 44
Table 8.1. QFN-24 Package Dimensions ................................................................ 45
Table 8.2. QFN-24 PCB Land Pattern Dimensions ................................................. 46
Table 9.1. Absolute Maximum Ratings .................................................................... 47
Table 9.2. Global Electrical Characteristics ............................................................. 48
Table 9.3. Port I/O DC Electrical Characteristics ..................................................... 49
Table 9.4. Reset Electrical Characteristics .............................................................. 49
Table 9.5. Internal Voltage Regulator Electrical Characteristics ............................. 50
Table 9.6. Flash Electrical Characteristics .............................................................. 50
Table 9.7. Internal High-Frequency Oscillator Electrical Characteristics ................. 50
Table 9.8. Capacitive Sense Electrical Characteristics ........................................... 51
Table 9.9. EEPROM Electrical Characteristics ........................................................ 52
Table 9.10. ADC0 Electrical Characteristics ............................................................ 52
Table 9.11. Power Management Electrical Characteristics ..................................... 53
Table 9.12. Temperature Sensor Electrical Characteristics .................................... 53
Table 9.13. Voltage Reference Electrical Characteristics ....................................... 53
Table 9.14. Comparator Electrical Characteristics .................................................. 54
Table 15.1. Gain Setting vs. Maximum Capacitance and Conversion Time ........... 81
Table 15.2. Operation with Auto-scan and Accumulate .......................................... 85
Table 16.1. CIP-51 Instruction Set Summary ........................................................ 100
Table 18.1. AC Parameters for External Memory Interface ................................... 126
Table 18.2. EMIF Pinout (C8051F700/1/2/3/8/9 and C8051F710/1) ..................... 127
Table 20.1. Special Function Register (SFR) Memory Map .................................. 131
Table 20.2. Special Function Registers ................................................................. 132
Table 21.1. Interrupt Summary .............................................................................. 139
Table 22.1. Flash Security Summary .................................................................... 150
Table 28.1. Port I/O Assignment for Analog Functions ......................................... 183
Table 28.2. Port I/O Assignment for Digital Functions ........................................... 184
Table 28.3. Port I/O Assignment for External Event Trigger Functions ................. 184
Table 29.1. Example 16-bit CRC Outputs ............................................................. 212
Table 29.2. Example 32-bit CRC Outputs ............................................................. 213
Table 30.1. SMBus Clock Source Selection .......................................................... 223
Table 30.2. Minimum SDA Setup and Hold Times ................................................ 224
Table 30.3. Sources for Hardware Changes to SMB0CN ..................................... 228
Rev. 1.0
11

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