|
|
PDF NAND256-A Data sheet ( Hoja de datos )
| Número de pieza | NAND256-A | |
| Descripción | SLC NAND flash memories | |
| Fabricantes | Numonyx | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de NAND256-A (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
NAND128-A NAND256-A
128-Mbit or 256-Mbit, 528-byte/264-word page,
3 V, SLC NAND flash memories
Features
• High density NAND flash memories
– Up to 256-Mbit memory array
– Up to 32-Mbit spare area
– Cost effective solutions for mass storage
applications
• NAND interface
– x8 or x16 bus width
– Multiplexed address/ data
– Pinout compatibility for all densities
• Supply voltage
– VDD = 2.7 to3.6 V
• Page size
– x8 device: (512 + 16 spare) bytes
– x16 device: (256 + 8 spare) words
• Block size
– x8 device: (16 K + 512 spare) bytes
– x16 device: (8 K + 256 spare) words
• Page read/program
– Random access: 12 µs (3V)/15 us (1.8V)
(max)
– Sequential access: 50 ns (min)
– Page program time: 200 µs (typ)
• Copy back program mode
– Fast page copy without external buffering
• Fast block erase
– Block erase time: 2 ms (typical)
• Status register
• Electronic signature
• Chip enable ‘don’t care’
– Simple interface with microcontroller
• Security features
– OTP area
– Serial number (unique ID)
TSOP48 12 x 20mm
FBGA
VFBGA55 8 x 10 x 1.05mm
• Hardware data protection
– Program/erase locked during power
transitions
• Data integrity
– 100,000 program/erase cycles
– 10 years data retention
• RoHS compliance
– Lead-free components are compliant with
the RoHS directive
• Development tools
– Error correction code software and
hardware models
– Bad blocks management and wear leveling
algorithms
– File system OS native reference software
– Hardware simulation models
October 2012
Rev. 17
1/60
www.numonyx.com
1
1 page  
NAND128-A, NAND256-A
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Logic block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
TSOP48 connections, x8 devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
TSOP48 connections, x16 devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
VFBGA55 connections, x8 devices (top view through package). . . . . . . . . . . . . . . . . . . . . . . .12
VFBGA55 connections, x16 devices (top view through package) . . . . . . . . . . . . . . . . . . . . . .13
Memory array organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Pointer operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Pointer operations for programming. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Read (A, B, C) operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Read block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Sequential row read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Sequential row read block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Page program operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Copy back operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Block erase operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
Bad block management flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Garbage collection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Error detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Equivalent testing circuit for AC characteristics measurement. . . . . . . . . . . . . . . . . . . . . . . .38
Command latch AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
Address latch AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
Data input latch AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
Sequential data output after read AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
Read status register AC waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44
Read electronic signature AC waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44
Page read A/read B operation AC waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
Read C operation, one page AC waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
Page program AC waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
Block erase AC waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
Reset AC waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
Ready/Busy AC waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
Ready/busy load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
Resistor value versus waveform timings for Ready/Busy signal . . . . . . . . . . . . . . . . . . . . . . .49
Data protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
TSOP48 - 48 lead plastic thin small outline, 12 x 20 mm, package outline . . . . . . . . . . . . . .51
VFBGA55 8 x 10 mm - 6 x 8 active ball array, 0.80 mm pitch, package outline . . . . . . . . . . .53
Connection to microcontroller, without glue logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56
Connection to microcontroller, with glue logic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57
Building storage modules. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57
5/60
5 Page 
NAND128-A, NAND256-A
Figure 4. TSOP48 connections, x16 devices
NC
NC
NC
NC
NC
NC
RB
R
E
(1)NC
NC
VDD
VSS
NC
(1)NC
CL
AL
W
WP
NC
NC
NC
NC
NC
1 48
NAND Flash
12 (x16) 37
13 36
24 25
VSS
I/O15
I/O7
I/O14
I/O6
I/O13
I/O5
I/O12
I/O4
NC(1)
NC
VDD
NC
NC
NC(1)
I/O11
I/O3
I/O10
I/O2
I/O9
I/O1
I/O8
I/O0
VSS
1. This pin is DU in the USOP48 package.
AI07559C
Description
11/60
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet NAND256-A.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| NAND256-A | 128 Mbit / 256 Mbit / 512 Mbit / 1 Gbit (x8/x16) 528 Byte/264 Word Page / 1.8V/3V / NAND Flash Memories |  STMicroelectronics |
| NAND256-A | SLC NAND flash memories | Numonyx |
| NAND256-M | (NANDxxx-M) NAND Flash Memories |  ST Microelectronics |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |