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PDF EM78P156K Data sheet ( Hoja de datos )
| Número de pieza | EM78P156K | |
| Descripción | 8-Bit Microcontroller | |
| Fabricantes | ELAN Microelectronics | |
| Logotipo |  |
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EM78P156K
8-Bit Microcontroller
with OTP ROM
Product
Specification
DOC. VERSION 1.3
ELAN MICROELECTRONICS CORP.
July 2012
1 page  
EM78P156K
8-Bit Microcontroller with OTP ROM
1 General Description
The EM78P156K is an 8-bit microprocessor designed and developed with low-power and high-speed
CMOS technology. The device has an on-chip 1024 ×13-bit Electrical One Time Programmable Read Only
Memory (OTP-ROM). It provides a protection bit to prevent intrusion of user’s OTP memory code. Three
Code option words are also available to meet user’s requirements.
With enhanced OTP-ROM features, the EM78P156K provides a convenient way of developing and verifying
user’s programs. Moreover, this OTP device offers the advantages of easy and effective program updates,
using development and programming tools. Users can avail of the ELAN Writer to easily program their
development code.
2 Features
CPU configuration
• 1k × 13 bits on-chip ROM
• 48 × 8 bits on-chip registers (SRAM, general
purpose)
• 5-level stacks for subroutine nesting
• Less than 1.5 mA at 5V / 4MHz
• Typically 15 µA at 3V / 32kHz
• Typically 1 µA during Sleep mode
I/O port configuration
• 2 bidirectional I/O ports : P5, P6
• 12 I/O pins
• Wake-up port : P6
• 5 Programmable pull-down I/O pins (P50 ~
P52, P60 ~ P63)
• 6 programmable pull-high I/O pins (P60 ~ P67)
• 6 programmable open-drain I/O pins (P60 ~
P67)
• 2 programmable R-option pins
• External interrupt : P60
Operating voltage range:
• 2.1V ~ 5.5V at 0 ~ 70 (C (Commercial)
• 2.3V ~ 5.5V at -40 ~ 85 (C (Industrial)
Operating frequency range (base on 2 clocks):
• Crystal mode:
DC ~ 20MHz / 2clks @ 5V
DC ~ 8MHz / 2clks @ 3V
DC ~ 4MHz / 2clks @ 2.1V
• ERC mode:
DC ~ 2MHz / 2clks @ 2.1V
• IRC mode:
Internal
RC Freq. Temp.
(-40~85°C)
Drift Rate
Voltage Process Total
4 MHz ± 1% ± 3% @ 2.1~5.5V ± 2% ± 6%
16 MHz ± 1% ± 1% @ 4.0~5.5V ± 2% ± 4%
8 MHz ± 1% ± 2% @ 3.0~5.5V ± 2% ± 5%
1 MHz ± 1% ± 3% @ 2.1~5.5V ± 2% ± 6%
Peripheral configuration
• 8-bit real time clock / counter (TCC) with
selective signal sources, trigger edges, and
overflow interrupt
• Power on reset and 3 programmable level voltage
reset
POR: 1.8V (Default), LVR: 4.0, 3.5, 2.7V
• 2 / 4 clocks per instruction cycle selected by
code option
• High EFT immunity
Three available interrupts:
• TCC overflow interrupt
• Input-port status changed interrupt (wake-up
from sleep mode)
• External interrupt
Special Features
• Programmable free running watchdog timer
• Power saving sleep mode
• Selectable oscillation mode
Package type:
• 18-pin DIP 300mil : EM78P156KD18J
• 18-pin SOP 300mil : EM78P156KSO18J
• 20-pin SSOP 209mil : EM78P156KJSS20J
Note: These are all Green products which do not
contain hazardous substances.
Product Specification (V1.3) 07.25.2012
(This specification is subject to change without further notice)
•1
5 Page 
EM78P156K
8-Bit Microcontroller with OTP ROM
6.1.4 R3 (Status Register)
Bit 7
GP2
Bit 6
GP1
Bit 5
GP0
Bit 4
T
Bit 3
P
Bit 2
Z
Bit 1
DC
Bit 0
C
Bits 7 ~ 5 (GP2 ~ GP0): General-purpose read / write bits
Bit 4 (T): Time-out bit
Set to “1” with the "SLEP" and "WDTC" commands, or during power up;
and reset to “0” by WDT time-out.
Bit 3 (P): Power down bit
Set to “1” during power on or by a "WDTC" command; and reset to “0” by
a "SLEP" command.
Bit 2 (Z): Zero flag
Set to "1" if the result of an arithmetic or logic operation is zero.
Bit 1 (DC): Auxiliary carry flag
Bit 0 (C): Carry flag
6.1.5 R4 (RAM Select Register)
Bits 7 ~ 6 are not used (read only).
Bits 7 ~ 6 set to “1” at all time.
Bits 5 ~ 0 are used to select registers (Address: 0x00 ~ 0x06, 0x0F ~ 0x3F) in the
indirect addressing mode.
See the Data Memory Configuration in Figure 6-2.
6.1.6 R5 ~ R6 (Port 5 ~ Port 6)
R5 and R6 are I/O registers.
Only the lower 4 bits of R5 are available.
The upper 4 bits of R5 are fixed to “0”.
6.1.7 RF (Interrupt Status Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
-
-
-
-
-
EXIF
ICIF
Note: “ 1 ” means with interrupt request “ 0 ” means no interrupt occurs
Bit 0
TCIF
Bits 7 ~ 3: Not used.
Bit 2 (EXIF): External interrupt flag. Set by a falling edge on the /INT pin, reset by
software.
Product Specification (V1.3) 07.25.2012
(This specification is subject to change without further notice)
•7
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet EM78P156K.PDF ] | |
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