|
|
PDF TDA8035 Data sheet ( Hoja de datos )
| Número de pieza | TDA8035 | |
| Descripción | High integrated and low power smart card interface | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de TDA8035 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
TDA8035
High integrated and low power smart card interface
Rev. 3.0 — 25 June 2014
Product data sheet
COMPANY PUBLIC
1. General description
The TDA8035 is the cost efficient successor of the established integrated contact smart
card reader IC TDA8024. It offers a high level of security for the card by performing
current limitation, short-circuit detection, ESD protection as well as supply supervision.
The current consumption during the standby mode of the contact reader is very low as it
operates in the 3 V supply domain. The TDA8035 is therefore the ideal component for a
power efficient contact reader.
2. Features and benefits
2.1 Protection of the contact smart card
Thermal and short-circuit protection on all card contacts
VCC regulation:
5 V, 3 V, 1.8 V 5 % on 2 220 nF multilayer ceramic capacitors with low ESR
Current spikes of 40 nA/s (VCC = 5 V and 3 V) or 15 nA/s (VCC = 1.8 V) up to
20 MHz, with controlled rise and fall times. Filtered overload detection is
approximately 120 mA.
Automatic activation and deactivation sequences initiated by software or by hardware
in the event of a short-circuit, card take-off, overheating, falling VREG VDD(INTF),VDDP
Enhanced card-side ElectroStatic Discharge (ESD) protection of (> 8 kV)
Supply supervisor for killing spikes during power on and off:
threshold internally fixed
externally by a resistor bridge
2.2 Easy integration into your contact reader
SW compatible to TDA8024 and TDA8034
5 V, 3 V, 1.8 V smart card supply
DC-to-DC converter for VCC generation separately powered from 2.7 V to 5.5 V supply
(VDDP and GNDP)
Very low power consumption in Deep Shutdown mode
Three protected half-duplex bidirectional buffered I/O lines (C4, C7 and C8)
External clock input up to 26 MHz
Card clock generation up to 20 MHz using pins CLKDIV1 and CLKDIV2 with
synchronous frequency changes of fXTAL, fXTAL/2, fXTAL/4 or fXTAL/8
Non-inverted control of pin RST using pin RSTIN
Built-in debouncing on card presence contact
1 page  
NXP Semiconductors
7. Pinning information
7.1 Pinning
TDA8035
High integrated and low power smart card interface
terminal 1
index area
I/OUC
PORADJ
CMDVCCN
VDD(INTF)
CLKDIV1
CLKDIV2
EN_5V/3VN
EN_1.8VN
1
2
3
4
5
6
7
8
TDA8035
24 CLK
23 RST
22 VCC
21 VUP
20 SAP
19 SBP
18 VDDP
17 SBM
Transparent top view
Fig 2. Pin configuration HVQFN32
001aan746
7.2 Pin description
Table 3. Pin description
Symbol
Pin Supply
I/OUC
1 VDD(INTF)
PORADJ 2 VDD(INTF)
CMDVCCN
VDD(INTF)
CLKDIV1
CLKDIV2
EN_5V/3VN
3
4
5
6
7
VDD(INTF)
VDD(INTF)
VDD(INTF)
VDD(INTF)
VDD(INTF)
EN_1.8 VN
RSTIN
OFFN
8
9
10
VDD(INTF)
VDD(INTF)
VDD(INTF)
GND
XTAL1
XTAL2
VREG
SAM
11 -
12 VDD(INTF)
13 VDD(INTF)
14 VDDP
15 VDDP
GNDP
16 -
Type
I/O
I
I
supply
I
I
I
I
I
O
supply
I
O
supply
I/O
supply
Description
host data I/O line (internal 10 k pull-up resistor to VDD(INTF))
Input for VDD(INTF) supervisor. PORADJ threshold can be changed with an
external R bridge
start activation sequence input from the host (active LOW)
interface supply voltage
control with CLKDIV2 for choosing CLK frequency (see Table 4)
control with CLKDIV1 for choosing CLK frequency (see Table 4)
control signal for selecting VCC = 5 V (HIGH) or VCC = 3 V (LOW) if
EN_1.8 VN = High
control signal for selecting VCC = 1.8 V (low)
card reset input from the host (active HIGH)
NMOS interrupt to the host (active LOW) with 10 k internal pull-up resistor to
VDD(INTF) (See fault detection)
ground
crystal connection 1
crystal connection 2
Internal supply voltage
DC-to-DC converter capacitor; connected between SAM and SAP; C = 330 nF
or 100 nF (see Figure 13) with ESR < 100 m at Freq=100kHz
DC-to-DC converter power supply ground
TDA8035
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.0 — 25 June 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
5 of 31
5 Page 
NXP Semiconductors
TDA8035
High integrated and low power smart card interface
8.4 I/O circuitry
The three data lines I/O, AUX1 and AUX2 are identical.
To enter the idle state, both lines (I/O and I/OUC) are pulled HIGH via a 10 k resistor (I/O
to VCC and I/OUC to VDD(INTF)).
I/O is referenced to VCC, and I/OUC to VDD(INTF) which allows operation with
VCC VDD(INTF).
The first side on which a falling edge occurs becomes the master. An anti-latch circuit
disables the detection of falling edges on the other line, which becomes the slave.
After a time delay td(edge), the logic 0 present on the master side is transmitted to the slave
side.
When the master side returns to logic 1, the slave side transmits the logic 1 during the
time delay tpu and both sides return to their idle states.
The active pull-up feature ensures fast Low to High transitions. It is able to deliver more
than 1 mA to an output voltage of 0.9 VCC on an 80 pF load. At the end of the active
pull-up pulse, the output voltage depends on the internal pull-up resistor and on the load
current.
The current to and from the cards I/O lines is internally limited to 15 mA.
The maximum frequency on these lines is 1.5 MHz.
TDA8035
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.0 — 25 June 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
11 of 31
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet TDA8035.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| TDA8030 | USB smart card reader (OTP or ROM) | NXP Semiconductors |
| TDA8031 | USB smart card reader (OTP or ROM) | NXP Semiconductors |
| TDA8034AT | Smart Card Interface | NXP Semiconductors |
| TDA8034HN | Smart Card Interface | NXP Semiconductors |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |