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PDF TD080WGCA1 Datasheet ( Hoja de datos )

Número de pieza TD080WGCA1
Descripción TFT LCD
Fabricantes toppoly 
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TD080WGCA1 Hoja de datos, Descripción, Manual
Target
TD080WGCA1
Ver.: 0.00
TFT LCD Specification
Model Name: TD080WGCA1
Customer Signature
Date
This technical specification is subjected to change without notice.
The information contained herein is the exclusive property and confidential document of TPO Displays Corp.., and
shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of TPO Displays
Corp...
Page: 1/18

1 page

TD080WGCA1 pdf
TD080WGCA1
3. INPUT/OUTPUT TERMINALS
3.1 TFT LCD Panel
Connector type: FH12-30S-0.5SH or Compatible
Pin Symbol I/O
Description
Remark
1 VCOM -- Common voltage
2
VEE
-- Power supply (-4V)
3
VDD
-- Power supply (+13V)
4
CSVO
I
CSV=H, CSVO=-6V
CSV=L, CSVO=12V
5
XCSVO
I
CSV=H, XCSVO=12V
CSV=L, XCSVO=-6V
6
GND
-- Ground for digital circuit
7 AVSS -- Ground for analog circuit
8 POLC4 I POL period control.
9 POLC3 I POL period control.
10 POLC2 I POL period control.
11 POLC1 I POL period control.
12 VCC
Power supply (3.3V)
CMOS & PMOS timing select
13 CMOSB I CMOSB=H, CMOS timing
CMOSB=L, PMOS timing
Control Self-protection function
14 OFPTON I OFPTRN=H, Control Self-protection function is on
OFPTRN=L, Control Self-protection function is off
Self-protection function
Intentionally writes black/White screen while
getting abnormal signals. But if the signal
15
OFPTRN
I
returns normal, display normal screen.
OFPTRN=H, The output data will produce full
white pattern.
OFPTRN=L, The output data will produce full
black pattern.
16 CKHP2 I CKH plane timing adjust 2
17 CKHP1 I CKH plane timing adjust 1
18 ENBP2 I ENB period adjust 2
19 ENBP1 I ENB period adjust 1
The information contained herein is the exclusive property and confidential document of TPO Displays Corp.., and
shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of TPO Displays
Corp...
Page: 5/18

5 Page

TD080WGCA1 arduino
TD080WGCA1
6.2 Power ON/OFF Sequence
To prevent a latch-up or DC operation of the LCD module, the power on/off sequence should be as
the diagram below.
Power Supply VDD
0V
Interface signals
0.1VDD 0.9VDD
T1
T2
VALID
0.9VDD 0.1VDD
0.1VDD
T4
T3
Backlight
T6
T5
T1 10ms 0 T2 50ms 0 T3 50ms 400ms T4 200ms T5 100ms T6
T1:VDD rising time from 0.1VDD to 0.9VDD.
T2:The time from 0.9VDD to valid data at power ON.
T3:The time from 0.9VDD to valid data at power OFF.
T4:VDD off time for window restarts.
T5:The time from valid data to B/L enable at POWER ON.
T6 The time from valid data to B/L enable at POWER OFF
6.3 Timing Characteristics
Parameter
Symbol MIN
TYP MAX Unit Remarks
Frequency
1/Tc
--
33.2 36.2 MHz Tc=tnclk
Clock(NCLK) High Time
Tch
5
-- -- ns
Low Time
Tcl
5
-- -- ns
Data
Setup Time Tds
3
-- -- ns
Hold Time
Tdh
10
--
-- ns
Horizontal sync. Cycle
Signal
TH
31.8
1056
-- us
clock
Pulse Width THp
1
128
clock
Vertical sync. Cycle
TV
525 line
Signal
Pulse Width TVp
1
4
line
Horizontal display period
THd
800 clock
Hsync-Clock phase difference THc
10
--
Tc-10
ns
Hsync-Vsync phase difference TVh
0
-- TH-THp ns
Vertical display start position TVs
33 line
Vertical display period
TVd
480 line
Enable signal Setup time Tes
5
--
Tc-10
ns
Pulse width Tep 2 800 TH-10 clock
The information contained herein is the exclusive property and confidential document of TPO Displays Corp.., and
shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of TPO Displays
Corp...
Page: 11/18

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