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PDF 93CS20 Data sheet ( Hoja de datos )

Número de pieza 93CS20
Descripción Low Voltage / Low Power CMOS 16-Bit Microcontrollers
Fabricantes Toshiba Semiconductor 
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TMP93CS20
Low Voltage/Low Power
CMOS 16-Bit Microcontroller
TMP93CS20F
1. Outline and Device Characteristics
The TMP93CS20 is high-speed, advanced 16-bit microcontroller. It enables low-voltage and
low-power-consumption operation.
The TMP93CS20 is housed in 144-pin flat packages.
The device characteristics are as follows:
(1) Original 16-bit CPU (900/L CPU)
TLCS-90 instruction mnemonic upward compatible
16-Mbyte linear address space
General-purpose registers, register bank system
16-bit multiplication, 16-bit division, bit transfer and bit manipulation instructions
Micro DMA: 4 channels (1.6 µs per 2 bytes at 20 MHz)
(2) Minimum instruction execution time: 200 ns at 20 MHz
(3) Internal RAM: 2 Kbytes
Internal ROM: 64 Kbytes
(4) LCD driver
Boosting circuit (Reference voltage external input)
Maximum 40 segments × 4 commons
1/4, 1/3, 1/2 duty, static driving selection
(5) Timer for realtime clock: 1 channel
(6) 8-bit timer: 4 channels
(7) 16-bit timer: 4 channels
030619EBP1
The information contained herein is subject to change without notice.
The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by
implication or otherwise under any patent or patent rights of TOSHIBA or others.
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid
situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to
property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most
recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for
Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunctionor
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control
instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made
at the customer’s own risk.
The products described in this document are subject to the foreign exchange and foreign trade laws.
TOSHIBA products should not be embedded to the downstream products which are prohibited to be produced and sold, under any law
and regulations.
For a discussion of how the reliability of microcontrollers can be predicted, please refer to Section 1.3 of the chapter entitled Quality
and Reliability Assurance/Handling Precautions.
Purchase of TOSHIBA I2C components conveys a license under the Philips I2C Patent Rights to use
these components in an I2C system, provided that the system conforms to the I2C Standard
Specification as defined by Philips.
93CS20-1
2004-02-10

1 page




93CS20 pdf
TMP93CS20
2.2 Pin Names and Functions
The names of the input/output pins and their functions are described below. Table 2.2.1 shows
pin names and functions.
Table 2.2.1 Pin Names and Function (1/3)
Pin Names
P00 to P07
AD0 to AD7
P10 to P17
AD8 to AD15
A8 to A15
P20 to P27
Number of
Pins
8
8
8
A0 to A7
A16 to A23
P30
RD
P31
WR
P32
HWR
P33
INT0
1
1
1
1
P34
INT1
P35
INT2
P36
INT3
P37
INT4
1
1
1
1
ADTRG
P40
TI4
KEY0
P41
TO4
KEY1
P42
TI6
KEY2
P43
TO6
KEY3
P44 to P47
KEY4 to KEY7
1
1
1
1
4
I/O
I/O
I/O
I/O
I/O
Output
I/O
Output
Output
Output
Output
Output
Output
I/O
Output
I/O
Input
I/O
Input
I/O
Input
I/O
Input
I/O
Input
Input
I/O
Input
Input
I/O
Output
Input
I/O
Input
Input
I/O
Output
Input
I/O
Input
Functions
Port 0: I/O port that allows I/O to be selected at the bit level.
Address and data (Lower): Bits 0 to 7 for address and data bus.
Port 1: I/O port that allows I/O to be selected at the bit level.
Address and data (Upper): Bits 8 to 15 for address and data bus.
Address: Bits 8 to 15 for address bus.
Port 2: I/O port that allows I/O to be selected at the bit level.
(with pull-up resistor.)
Address: Bits 0 to 7 for address bus.
Address: Bits 16 to 23 for address bus.
Port 30: Output port.
Read: Strobe signal for reading external memory.
(Read when reading internal memory at P3<P30> = 0, P3FC<P30F> = 1.)
Port 31: Output port.
Write: Strobe signal for writing data on pins AD0 to AD7.
Port 32: I/O port (with pull-up resistor).
High write: Strobe signal for writing data on pins AD8 to AD15.
Port 33: I/O port (with pull-up resistor).
Interrupt request pin 0: Interrupt request pin with programmable
level/rising/falling edge.
Port 34: I/O port (with pull-up resistor).
Interrupt request pin 1: Interrupt request pin with programmable rising/falling
edge.
Port 35: I/O port (with pull-up resistor).
Interrupt request pin 2: Interrupt request pin with programmable rising/falling
edge.
Port 36: I/O port (with pull-up resistor).
Interrupt request pin 3: Interrupt request pin with programmable rising/falling
edge.
Port 37: I/O port (with pull-up resistor).
Interrupt request pin 4: Interrupt request pin with programmable rising/falling
edge.
AD converter external start trigger input.
Port 40: I/O port (with pull-up resistor).
Timer input 4: 16-bit timer 4 input.
Key input 0: Key-on wakeup pin 0.
Port 41: I/O port (with pull-up resistor).
Timer output 4: 16-bit timer 4 output.
Key input 1: Key-on wakeup pin 1.
Port 42: I/O port (with pull-up resistor).
Timer input 6: 16-bit timer 6 input.
Key input 2: Key-on wakeup pin 2.
Port 43: I/O port (with pull-up resistor).
Timer output 6: 16-bit timer 6 output.
Key input 3: Key-on wakeup pin 3.
Port 44 to 47: I/O port (with pull-up resistor).
Key input 4 to 7: Key-on wakeup pin 4 to 7.
93CS20-5
2004-02-10

5 Page





93CS20 arduino
TMP93CS20
3.3 Dual Clock, Standby Function
Dual clock, standby control circuits are comprised of a system clock controller, prescaler clock
controller, internal clock pin output function and standby controller.
The oscillator operating modes are classified as either (a) single clock mode (Using only the
X1 and X2 pins), or (b) dual clock mode (Using the X1, X2, XT1, and XT2 pins).
Figure 3.3.1 shows state diagrams for the two clock modes. Figure 3.3.2 shows the
corresponding block diagram, Figure 3.3.3 displays functions of the I/O registers and Table
3.3.1 lists correspondences between alternative states of the system clock and those of the CPU,
oscillator and internal I/O components.
RUN mode
(Stops only CPU)
Instruction
Interrupt
IDLE2 mode
(Stops CPU and AD)
Instruction
Interrupt
Instruction
IDLE1 mode
(Operates only oscillator)
Interrupt
Reset
Release reset
NORMAL mode
(fc/gear value/2)
Instruction
Interrupt
STOP mode
(Stops all circuits)
(a) Single clock mode state diagram
RUN mode
(Stops only CPU)
Instruction
Interrupt
Instruction
IDLE2 mode
(Stops CPU and AD)
Interrupt
IDLE1 mode
Instruction
(Operates only oscillator)
Interrupt
RUN mode
(Stops only CPU)
IDLE2 mode
(Stops CPU and AD)
Instruction
Interrupt
Instruction
Interrupt
IDLE1 mode
(Operates only oscillator)
Instruction
Interrupt
Reset
Release reset
NORMAL mode
(fc/gear value/2)
Instruction
Instruction
SLOW mode
(fs/2)
Interrupt
STOP mode
(Stops all circuits)
Instruction
(b) Dual clock mode state diagram
Figure 3.3.1 State Diagrams
The clock frequency input from the X1 and X2 pins is called fc, and the clock frequency input
from the XT1 and XT2 pins is called fs. The clock frequency selected by SYSCR1<SYSCK> is
called the system clock fFPH. The divided clock of fFPH is defined as the system clock fSYS, and
one cycle of fSYS is defined as one state.
93CS20-11
2004-02-10

11 Page







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