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Número de pieza | SED1335 | |
Descripción | CMOS GRAPHIC LCD CONTROLLER | |
Fabricantes | ETC | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de SED1335 (archivo pdf) en la parte inferior de esta página. Total 14 Páginas | ||
No Preview Available ! SED1335
s DESCRIPTION
CMOS GRAPHIC LCD CONTROLLER
For Medium-Scale LCD
• Low Operating Voltage 2.7 to 5.0V
•• On-Chip Character Generator ROM
The SED1335 is a CMOS low-power dot matrix liquid crystal graphic display controller. The device stores in
external RAM display data sent by an 8-bit microcomputer, and generates all the signals required by the LCD
drivers. The LSI incorporates an internal character generator ROM which supports user-defined characters
(also an external CGROM can be supported).
The SED1335 can be interfaced to high-speed microprocessors such as the Intel family or Motorola family.
The controller supports a set of rich commands that will allow the user to create a layered display of characters
and graphics.
Also, the controller functions as a pipeline buffer between the MPU and display memory so that low-cost,
medium-speed SRAM can be used.
s FEATURES
• CMOS low-power graphic and character display
controller
• Selectable MPU interface is compatible with both
the Intel family and the Motorola family
• Smooth scrolling support:
Horizontal and vertical scroll
Scrolling of selected areas of the display
• Multimode display:
2 layers of overlapping characters and graphics
3 layers of overlapping graphics
• Selectable display synthesis:
Inverse video
Flashing display, cursor on/off/blink
Under and bar cursor, block cursor
Simple animation
• Programmable cursor
s SYSTEM BLOCK DIAGRAM
• Internal character generator ROM
• Supports external character generator ROM:
8 × 8 or 8 × 16 pixel characters
Allowing mixing of ROM and RAM character sets
• Supports 64K bytes of memory:
4K bytes of user-definable characters
60K bytes of display memory
in 2 of 32K × 8 100ns SRAM
or in 8 of 8K × 8 100ns SRAM
• Display duty .................... 1/2 to 1/256
• Low power dissipation
5mA (typical)
0.05µA (typical), standby
• Logic power supply .......................... 2.7 to 5.5V
• Package: .................. Plastic QFP5-60 pin (F0A)
Plastic QFP6-60 pin (F0B)
DATA
CPU CONTROL
SED1335F
68xx
80xx
SRAM
139
MONO LCD
1 page SED1335
• DC Electrical Characteristics (2)
Parameter
Symbol
Operating voltage
VDD
Register data retention voltage VOH
High level input voltage
T Low level input voltage
T
L High level output voltage
Low level output voltage
VIHT
VILT
VOHT
VOLT
C High level input voltage
M Low level input voltage
O High level output voltage
S
Low level output voltage
S
C
H
Positive trigger threshold voltage
M
I
T
Negative trigger threshold voltage
T
Input leakage current
VIHC
VILC
VOHC
VOLC
VT+
VT–
ILI
Output leakage current
ILO
Average operating current
Iopr
Standby current
Oscillation frequency
External clock frequency
Feed back resistance
IQ
fosc
fCL
Rf
(VSS = 0V, VDD = 2.7 to 4.5V, Ta = –20 to 75°C)
Condition
IOH = –3.0mA
IOL = 3.0mA
IOH = –1.0mA
IOL = 1.0mA
VIN = VDD/VSS
fosc = 6.1MHz, No-load
256 × 200 dot
Sleep
XG, CS, RD = VDD
AT X’tal
Duty 47.5%
Min Typ Max Unit Terminal
2.7 3.5 4.5
2.0 — 6.0
V
V
VDD
0.8xVDD — VDD
V D0 to D7,
VSS
— 0.2xVDD
V
A0, CS, RD,
WR, VD0 to
VDD–0.4 —
—
V
VD7, VA0 to
VA15, VCE,
— — VSS+0.4 V VRD, VWR
0.8xVDD
VSS
VDD–0.4
—
— VDD
— 0.2xVDD
——
— VSS+0.4
V
V
V
V
SEL1, SEL2,
YD, XD0 to
XD3, XSCL,
YDIS, LP,
WF, CL0,
XECL, YSCL
0.5VDD 0.7VDD 0.8VDD
0.2VDD 0.3VDD 0.5VDD
V
V
RES
— 0.05 2.0 µA
— 0.10 5.0 µA
3.5
— 7.0
(VDD=3.5V)
mA
VDD
— 0.05 20 µA VDD
1.0 — 8.0 MHz
1.0 — 8.0 MHz XG, XD
0.7 — 4.0 MΩ
143
5 Page ° LCD Output Timing
The following characteristics are for a 1/64 duty cycle.
Row 62 63 64 1 2 3 4
60 61 62 63 64
LP
1 frame time
YD
WF
WF
Row 64
LP
1 line time
Row 1
Row 2
XSCL
XD0 to XD3 (14) (15) (16)
(1)
(15) (16) (1) (2) (3)
(15) (16) (1)
XSCL
tr
XD0 to XD3
LP
tWX
tDS
tLD
WF(B)
YD
tf
tDH
tLS
tWL
tCX
tDHY
tDF
149
SED1335
11 Page |
Páginas | Total 14 Páginas | |
PDF Descargar | [ Datasheet SED1335.PDF ] |
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