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PDF DEM16217FGH-LR Data sheet ( Hoja de datos )

Número de pieza DEM16217FGH-LR
Descripción LCD MODULE
Fabricantes Display Elektronik 
Logotipo Display Elektronik Logotipo



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No Preview Available ! DEM16217FGH-LR Hoja de datos, Descripción, Manual

Display Elektronik GmbH
LCD MODULE
DEM 16217 FGH-LR
Product specification
Version : 5
14.04.2003

1 page




DEM16217FGH-LR pdf
DEM 16217 FGH-LR
4. EXTERNAL DIMENSIONS
Product Specification
Figure 2.0 External Dimensions For DEM 16217 FGH-LR
5. PIN ASSIGNMENT
Pin No. Symbol
1 VSS
2 VDD
3 V0
4 RS
5 R/W
6E
7 DB0
8 DB1
9 DB2
10 DB3
11 DB4
12 DB5
13 DB6
14 DB7
L- LED – (K)
L+ LED + (A)
Function
Ground terminal of module.
Supply terminal of module 2.7V to 5.5V.
Power Supply for liquid crystal drive.
Register select
RS = 0 (Instruction register)
RS = 1 (Data register)
Read /Write
R/W = 1 (Read)
R/W = 0 (Write)
Enable
Bi-directional data bus, data transfer is performed once, thru
DB0 to DB7, in the case of interface data. Length is 8-bits; and
twice, thru DB4 to DB7 in the case of interface data length is 4-
bits. Upper four bits first then lower four bits.
Please also refer to 6.1 PCB drawing and description.
Please also refer to 6.1 PCB drawing and description.
Version: 5
PAGE: 3

5 Page





DEM16217FGH-LR arduino
DEM 16217 FGH-LR
Product Specification
7) Set CGRAM address
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0
Set CGRAM address to AC.
THIS INSTRUCTION MAKES CGRAM data available from MPU.
8) Set DDRAM address
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0
Set DDRAM address to AC
This instruction makes DDRAM data available from MPU.
When in 1-line display mode (N=0), DDRAM address is from “00H” to “4FH”.
In 2-line display mode (N=1), DDRAM address in the 1st line is from “00H” to “27H”, and DDRAM address in the
2nd line is from “40H” to “67H”.
9) Read busy flag & address
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0
This instruction shows whether KS0070B is in internal operation or not. If the resultant BF is “1”, it means the
internal operation is in progress and your have to wait until BF is low. Then the next instruction can be performed. In
this instruction your can also read the value of the address counter.
10) Write data to RAM
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
1 0 D7 D6 D5 D4 D3 D2 D1 D0
Write binary 8-bit data to DDRAM / CGRAM
The selection of RAM from DDRAM, and CGRAM, is set by the previous address set instruction: DDRAM address
set, and CGRAM address set. RAM set instruction can also determine the AC direction to RAM.
After write operation, the address is automatically increased/decreased by 1, according to the entry mode.
11) Read data to RAM
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
1 1 D7 D6 D5 D4 D3 D2 D1 D0
Read binary 8-bit data from DDRAM/CGRAM.
The selection of RAM is set by the previous address set instruction. If the address set instruction of RAM is not
performed before this instruction, the data that is read first is invalid, because the direction of AC is not determined.
If you read RAM data several times without RAM address set instruction before read operation, you can get correct
RAM data. In the case of DDRAM read operation, cursor shift instruction plays the same role as DDRAM address
set instruction; it also transfers RAM data to the output data register.
After read operation the address counter is automatically increased/decreased by 1 according to the entry mode. After
CGRAM read operation, display shift may not be executed correctly.
In the case of RAM write operation, after this AC is increased/decreased by 1 like read operation. At his time, AC
indicates the next address position, but your can read only the previous data by the read instruction.
Version: 5
PAGE: 9

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