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PDF TC74HC4538AP Data sheet ( Hoja de datos )
| Número de pieza | TC74HC4538AP | |
| Descripción | Dual Retriggerable Monostable Multivibrator | |
| Fabricantes | Toshiba Semiconductor | |
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TC74HC4538AP/AF/AFT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC4538AP,TC74HC4538AF,TC74HC4538AFT
Dual Retriggerable Monostable Multivibrator
The TC74HC4538A is a high speed CMOS MONOSTABLE
MULTIVIBRATOR fabricated with silicon gate C2MOS
technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
There are two trigger inputs, A input (positive edge input), and
B input (negative edge input). These inputs are valid for a slow
rise/fall time signal (tr = tf = 1 s) as they are schmitt trigger
inputs.
After triggering, the output stays in a MONOSTABLE state for
the time period determined by the external resistor and capacitor
(RX, CX). A low level at CD input breaks this STABLE STATE.
In the MONOSTABLE state, if a new trigger is applied, it makes
the MONOSTABLE period longer (retrigger mode).
Limitations for CX and RX are as follows:
External capacitor CX ........... No limitation
External resistor RX .............. VCC = 2.0 V more than 5 kΩ
VCC ≥ 3.0 V more than 1 kΩ
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features (Note)
• High speed: tpd = 25 ns (typ.) at VCC = 5 V
• Low power dissipation
Stand by state: ICC = 4 μA (max) at Ta = 25°C
Active state: ICC = 300 μA (max) at Ta = 25°C
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Output drive capability: 10 LSTTL loads
• Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
• Balanced propagation delays: tpLH ∼− tpHL
• Wide operating voltage range: VCC (opr) = 2 V to 6 V
• Pin and function compatible with 4538B
Note: In the case of using only one circuit, CD should be
tied to GND, T1·T2·Q· Q should be tied to OPEN, the other
inputs should be tied to VCC or GND.
TC74HC4538AP
TC74HC4538AF
TC74HC4538AFT
Weight
DIP16-P-300-2.54A
SOP16-P-300.1.27A
TSSOP16-P-0044-0.65A
: 1.00 g (typ.)
: 0.18 (typ.)
: 0.06 g (typ.
1 2012-02-29
1 page  
TC74HC4538AP/AF/AFT
Functional Description
(1) Stand-by state
The external capacitor is fully charge to VCC in the stand-by state. That means, before triggering,
QP and QN transistors which are connected to the T2 node are in the off state. Two comparators that
relate to the timing of the output pulse, and two reference voltage supplies stop their operation. The
total supply current is only leakage current.
(2) Trigger operation
Trigger operation is effective in either of the following two cases. One is the condition where the A
input is low, and the B input has a falling signal. The other, where the B input is high, and the A
input has a rising signal.
After trigger becomes effective, comparators C1 and C2 start operating, and QN is turned on. The
external capacitor discharges through QN. The voltage level at the T2 node drops. If the T2 voltage
level falls to the internal reference voltage VrefL, the output of C1 becomes low. The flip-flop is then
reset and QN turns off. At that moment C1 stops but C2 continues operating.
After QN turns off, the voltage at T2 start rising at a rate determined by the time constant of
external capacitor CX and resistor RX.
After the triggering, output Q becomes high, following some delay time of the internal F/F and
gates. It stays high even if the voltage of T2 changes from falling to rising. When T2 reaches the
internal reference voltage VrefH, the output of C2 becomes low, the output Q goes low and C2 stops its
operation. That means, after triggering, when the voltage level of T2 reaches VrefH, the IC returns to
its MONOSTABLE state.
In the case of large value of CX and RX, and ignoring the discharge time of the capacitor and
internal delays of the IC, the width of the output pulse, (twOUT), is as follows:
twOUT = 0.70·CX·RX
(3) Retrigger operation
When another new trigger is applied to input A or B while in the MONOSTABLE state, it is
effective only if the IC is charging CX. The voltage level of T2 then falls to VrefL level again.
Therefore the Q output stays high if the next trigger comes in before the time period set by CX and
RX.
If the 2nd trigger is very close to previous trigger, such as application during the discharge cycle, the
2nd trigger will not be effective.
The minimum time for effective 2nd trigger, trr (min), depends on VCC and CX.
(4) Reset operation
In normal operation, CD input is held high. If CD is low, a trigger has no effect because the Q
output is held low and the trigger control F/F is reset. Also QP turns on and CX is charged rapidly to
VCC.
This means if CD input is set low, the IC goes into a wait state.
5 2012-02-29
5 Page 
Package Dimensions
TC74HC4538AP/AF/AFT
Weight: 1.00 g (typ.)
11 2012-02-29
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet TC74HC4538AP.PDF ] | |
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