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PDF LM185TA-TE1 Data sheet ( Hoja de datos )
| Número de pieza | LM185TA-TE1 | |
| Descripción | TFT-LCD Open cell | |
| Fabricantes | PANDA | |
| Logotipo |  |
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LM185TA-TE1 Tentative Spec.1.0
[Note 2] The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 50ºC with LCD module alone in a temperature controlled
chamber. Thermal management should be considered in your product design to prevent the surface
temperature of display area from being over 60ºC. The range of operating temperature may degrade
in case of improper thermal management in your product design.
[Note 3] The rating of environment is base on LCD module. Leave LCD cell alone, this environment condition
can’t be guaranteed. Except LCD cell, the customer has to consider the ability of other parts of LCD
module and LCD module process.
3. ELECTRICAL CHARACTERISTICS
3.1 Absolute Maximum Rating
Parameter
Symbol Condition
Ratings
Unit Remark
+5V supply voltage
VCC
Ta=25ɗ
0ǡ+6
V
Storage temperature
Tstg -
-20ǡ+60
ɗ
Operation temperature
Topa
-
0ǡ+50
ɗ
3.2 Control circuit driving
Parameter
Symbol Min Typ Max Unit Remark
+5V supply
voltage
Supply voltage
Current
dissipation
Permissible input ripple voltage
VCC
ICC
IRush
VRP
4.5
ȹ
ȹ
ȹ
5.0 5.5 V
580 900 mA
˰Note 1˱
VCC=5.0V,60Hz
Black Pattern
ȹ3
A
˰Note 2˱
ȹ 300 mVp-p VCC=5.0V
Differential Input High
Threshold Voltage Low
Input Differential Voltage
Differential Input Common Mode
Voltage
Power consumption
VTH
ȹ
VTL -100
ɴVIDɴ 100
VCM 1.0
Pȹ
ȹ 100 mV
ȹ ȹ mV
ȹ 600 mV
1.2 1.5 V
3 4.5 W
VCM=1.2V
˰Note 3˱
[VCM]: Common mode voltage of LVDS driver
[Note1]
*1) Power, data sequence
0.50msʀt1ʀ10ms
t4ʁ1 sec
0.01ms烋t2ʀ50ms
t5ʁ200ms
0.01ms烋t3ʀ50ms
t6ʁ200ms
5
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LM185TA-TE1 Tentative Spec.1.0
5. INTERFACE TIMING
5.1 INPUT SIGNAL TIMING SPECIFICATIONS
(a) The input signal timing specifications are shown as the following table and timing diagram.
Item Symbol Min Typ. Max.
DCLK
Freq.
Cycle
fCLK
tCLK
50 76 95
10.5 13.2 20
LCD
Timing
DENA
Horizontal
Vertical
Horizontal effective time
Horizontal blank time
Horizontal total time
Vertical frame Rate
Vertical total time
Vertical effective time
Vertical blank time
tHA
tHB
tH
Fr
tV
tVA
tVB
1366
80
1446
50
778
768
10
1366
200
1560
60
806
768
38
1366
570
1936
75
888
768
120
[Note]
*1) DENA (data enable) usually is positive
*2) DCLK still inputs during blanking
*3) DE mode only
*4) It maybe cause flicker at 50Hz.
(b) Timing Chart
a.Horizontal Signal
DCLK
DATA
(R,G,B)
First Data
Invalid Data 1 2 3
Last Data
1365 1366 Invalid Data
tHB tHA
DENA
Unit
MHz
ns
tCLK
tCLK
tCLK
Hz
tH
tH
tH
b.Vertical Signal
Line Data
DENA
Invalid Data 1 2 3
tVB tVA
767 768 Invalid Data
11
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| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet LM185TA-TE1.PDF ] | |
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