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PDF SEN06464H2CG1SA-30ER Datasheet ( Hoja de datos )

Número de pieza SEN06464H2CG1SA-30ER
Descripción 512MB DDR2 - SDRAM SO-DIMM
Fabricantes Swissbit 
Logotipo Swissbit Logotipo

Total 16 Páginas
		
SEN06464H2CG1SA-30ER Hoja de datos, Descripción, Manual
Data Sheet
Rev.1.0 18.02.2014
512MB DDR2 SDRAM SO-DIMM
200 Pin SO-DIMM
SEN06464H2CG1SA-xx[E/W]R
Up to PC2-6400 in FBGA Technology
RoHS compliant
Options:
Data Rate / Latency
Marking
DDR2 667 MT/s CL5
DDR2 800 MT/s CL6
-30
-25
Module Density
512MB with 4 dies and 1 rank
Standard Grade
Grade E
Grade W
(tA) 0°C to 70°C
(tC) 0°C to 85°C
(tA) 0°C to 85°C
(tC) 0°C to 95°C *)
(tA) -40°C to 85°C
(tC) -40°C to 95°C *)
*) The refresh rate has to be doubled when 85°C<TC<95°C
Features:
200-pin 64-bit DDR2 Small Outline, Dual-In-Line Double
Data Rate Synchronous DRAM Module
Module organization: single rank 64M x 64
VDD = 1.8V ±0.1V, VDDQ 1.8V ±0.1V
1.8V I/O ( SSTL_18 compatible)
Serial Presence Detect (SPD) EEPROM
Gold-contact pad
This module is fully pin and functional compatible to the
JEDEC PC2-6400 spec. and JEDEC- Standard MO-224.
(see www.jedec.org)
The pcb and all components are manufactured according
to the RoHS compliance specification
[EU Directive 2002/95/EC Restriction of Hazardous
Substances (RoHS)]
DDR2 - SDRAM component Samsung
K4T1G164QG
64Mx16 DDR2 SDRAM in FBGA-84 package
Four bit prefetch architecture
DLL to align DQ and DQS transitions with CK
Eight internal device banks for concurrent operation
Programmable CAS latency (CL)
Posted CAS additive latency (AL)
WRITE latency = READ latency 1 tCK
Programmable burst length: 4 or 8
Adjustable data-output drive strength
On-die termination (ODT)
Environmental Requirements:
Operating temperature (ambient)
standard Grade
0°C to 70°C
E-Grade
0°C to 85°C
W-Grade
Operating Humidity
-40°C to 85°C
10% to 90% relative humidity, noncondensing
Operating Pressure
105 to 69 kPa (up to 10000 ft.)
Storage Temperature
-55°C to 100°C
Storage Humidity
5% to 95% relative humidity, noncondensing
Storage Pressure
1682 PSI (up to 5000 ft.) at 50°C
Figure: mechanical dimensions1
Swissbit AG
Industriestrasse 4
CH-9552 Bronschhofen
Fon: +41 (0) 71 913 03 03
Fax: +41 (0) 71 913 03 15
1if no tolerances specified ± 0.15mm
www.swissbit.com
eMail: info@swissbit.com
Page 1
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1 page

SEN06464H2CG1SA-30ER pdf
Data Sheet
Rev.1.0 18.02.2014
FUNCTIONAL BLOCK DIAGRAMM 512MB DDR2 SDRAM SO-DIMM,
1 RANK AND 4 COMPONENTS
CKE0
ODT0
S0
3O+5%
DQS0
DQS0
DM0
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
LDQS
LDQS
LDM
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
CS ODT CKE
D0
LDQS
LDQS
LDM
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
DQS4
DQS4
DM4
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
LDQS
LDQS
LDM
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
CS ODT CKE
D2
DQS1
DQS1
DM1
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
UDQS
UDQS
UDM
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
UDQS
UDQS
UDM
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
DQS5
DQS5
DM5
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
UDQS
UDQS
UDM
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
DQS2
DQS2
DM2
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQS3
DQS3
DM3
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
LDQS
LDQS
LDM
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
CS ODT CKE
D1
UDQS
UDQS
UDM
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
DQS6
DQS6
DM6
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQS7
DQS7
DM7
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
LDQS
LDQS
LDM
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
CS ODT CKE
D3
UDQS
UDQS
UDM
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
BA0-BA2
A0-A13
RAS
CAS
WE
3O+5%
CK0
CK0
CK1
CK1
BA0-BA2: SDRAM D0-D3
A0-A13: SDRAM D0-D3
RAS: SDRAM D0-D3
CAS: SDRAM D0-D3
WE: SDRAM D0-D3
2 loads
VDDSPD
VDD
VSS
SPD
D0-D3
VREF
D0-D3
D0-D3/SPD
2 loads
SCL
Serial PD
WP
SA0 SA1 SA2
SA0 SA1
SDA
Swissbit AG
Industriestrasse 4
CH-9552 Bronschhofen
Fon: +41 (0) 71 913 03 03
Fax: +41 (0) 71 913 03 15
www.swissbit.com
eMail: info@swissbit.com
Page 5
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5 Page

SEN06464H2CG1SA-30ER arduino
Data Sheet
Rev.1.0 18.02.2014
DDR2 SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND RECOMMENDED
AC OPERATING CONDITIONS (Continued)
(0°C ≤ TCASE ≤ + 85°C; VDDQ = +1.8V ± 0.1V, VDD = +1.8V ± 0.1V)
AC CHARACTERISTICS
PARAMETER
ODT power-down exit latency
ODT enable from MRS
command
Exit active power-down to READ
command, MR [bit 12 = 0]
Exit active power-down to READ
command, MR [bit 12 = 1]
Exit precharge power-down to
any non-READ command
CKE minimum high/low time
SYMBOL
tAXPD
tMOD
tXARD
tXARDS
tXP
tCKE
5300-CL5
MIN MAX
8-
0 12
2
7 AL
-
-
2-
3-
6400-CL6
MIN MAX
8-
0 12
2
8 AL
-
-
2-
3-
Unit
tCK
ns
tCK
tCK
tCK
tCK
Swissbit AG
Industriestrasse 4
CH-9552 Bronschhofen
Fon: +41 (0) 71 913 03 03
Fax: +41 (0) 71 913 03 15
www.swissbit.com
eMail: info@swissbit.com
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