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PDF LC470EUS-SCA1 Data sheet ( Hoja de datos )

Número de pieza LC470EUS-SCA1
Descripción WUXGA TFT LCD
Fabricantes LG 
Logotipo LG Logotipo



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Product Specification
SPECIFICATION
FOR
APPROVAL
LC470EUS
( ) Preliminary Specification
( ) Final Specification
Title
BUYER
MODEL
LGE
47.0” WUXGA TFT LCD
SUPPLIER
LG.Display Co., Ltd.
*MODEL
LC470EUS
SUFFIX
SCA1 (RoHS Verified)
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
/
SIGNATURE
DATE
APPROVED BY
J. T. EU / Team Leader
SIGNATURE
DATE
REVIEWED BY
/ J. K. KIM / Project Leader
/
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 0.1
PREPARED BY
W. K SANG / Engineer
TV Products Development Dept.
LG. Display LCD Co., Ltd
0 /39

1 page




LC470EUS-SCA1 pdf
Product Specification
LC470EUS
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or damage to the
LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Min Max
Unit Note
Logic Power Voltage
VCC
-0.5
+4.0
VDC
Gate High Voltage
VGH
+18.0
+30.0
VDC
Gate Low Voltage
VGL
-8.0
-4.0
VDC
Source D-IC Analog Voltage
Gamma Ref. Voltage (Upper)
VDD
VGMH
-0.3
½VDD-0.5
+18.0
VDD+0.5
VDC
VDC
1
Gamma Ref. Voltage (Low)
BL Operating Input Voltage
(One Side)
Panel Front Temperature
Operating Temperature
Storage Temperature
Operating Ambient Humidity
VGML
VBL
TSUR
TOP
TST
HOP
-0.3
1300
-
0
-20
10
½ VDD+0.5
1600
+68
+50
+60
90
VDC
VRMS
°C
°C
°C
%RH
4
2,3
Storage Humidity
HST 10
90 %RH
Note: 1. Ambient temperature condition (Ta = 25 ± 2 °C )
2. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature
should be Max 39 °C and no condensation of water.
3. Gravity mura can be guaranteed below 40condition.
4. The maximum operating temperature is based on the test condition that the surface temperature
of display area is less than or equal to 68 with LCD module alone in a temperature controlled
chamber. Thermal management should be considered in final product design to prevent the surface
temperature of display area from being over 68 . The range of operating temperature may
degrade in case of improper thermal management in final product design.
90%
60
60%
Wet Bulb
Temperature [°C]
50
40
30
20
10
0
40%
10%
Storage
Operation
Ver. 0.1
-20 0 10 20 30 40 50 60 70 80
Dry Bulb Temperature [°C]
4 /39

5 Page





LC470EUS-SCA1 arduino
Product Specification
LC470EUS
-LCD Connector (CN2): TF06L-80S-0.5SH (Manufactured by Hirose) or Equivalent
Table 4-2. MODULE CONNECTOR(CN2) PIN CONFIGURATION
No Symbol
Description
1
GND
Ground
2
RRV5 -
Right Right Mini LVDS Receiver Signal(5-)
3
RRV5 +
Right Right Mini LVDS Receiver Signal(5+)
4
RRV4 -
Right Right Mini LVDS Receiver Signal(4-)
5
RRV4 +
Right Right Mini LVDS Receiver Signal(4+)
6
RRV3 -
Right Right Mini LVDS Receiver Signal(3-)
7
RRV3 +
Right Right Mini LVDS Receiver Signal(3+)
8
GND
Ground
9 RRVCLK - Right Right Mini LVDS Receiver Clock(-)
10 RRVCLK + Right Right Mini LVDS Receiver Clock(+)
11
GND
Ground
12
RRV2 -
Right Right Mini LVDS Receiver Signal(2-)
13
RRV2 +
Right Right Mini LVDS Receiver Signal(2+)
14
RRV1 -
Right Right Mini LVDS Receiver Signal(1-)
15
RRV1 +
Right Right Mini LVDS Receiver Signal(1+)
16
RRV0 -
Right Right Mini LVDS Receiver Signal(0-)
17
RRV0 +
Right Right Mini LVDS Receiver Signal(0+)
18
GND
Ground
19
RLV5 -
Right Left Mini LVDS Receiver Signal(5-)
20
RLV5 +
Right Left Mini LVDS Receiver Signal(5+)
21
RLV4 –
Right Left Mini LVDS Receiver Signal(4-)
22
RLV4 +
Right Left Mini LVDS Receiver Signal(4+)
23
RLV3 -
Right Left Mini LVDS Receiver Signal(3-)
24
RLV3 +
Right Left Mini LVDS Receiver Signal(3+)
25
GND
Ground
26 RLVCLK - Right Left Mini LVDS Receiver Clock(-)
27 RLVCLK + Right Left Mini LVDS Receiver Clock(+)
28
GND
Ground
29
RLV2 -
Right Left Mini LVDS Receiver Signal(2-)
30
RLV2 +
Right Left Mini LVDS Receiver Signal(2+)
31
RLV1 -
Right Left Mini LVDS Receiver Signal(1-)
32
RLV1 +
Right Left Mini LVDS Receiver Signal(1+)
33
RLV0 -
Right Left Mini LVDS Receiver Signal(0-)
34
RLV0 +
Right Left Mini LVDS Receiver Signal(0+)
35
GND
Ground
36
OPT_N
“H” Normal Display / “L” Rotation Display
37
H_CONV
Horizontal 2 Inversion Signal
38
SOE
Source Output Enable
39
GND
Ground
40
POL
Polarity Output Signal
No Symbol
Description
41
GSP
Gate Start Pulse
42
GND
Ground
43 GMA 18 Gamma Voltage 18
44 GMA 17 Gamma Voltage 17
45 GMA 16 Gamma Voltage 16
46 GMA 15 Gamma Voltage 15
47 GMA 14 Gamma Voltage 14
48 GMA 13 Gamma Voltage 13
49 GMA 12 Gamma Voltage 12
50 GMA 10 Gamma Voltage 10
51 GMA 9 Gamma Voltage 9
52 GMA 7 Gamma Voltage 7
53 GMA 6 Gamma Voltage 6
54 GMA 5 Gamma Voltage 5
55 GMA 4 Gamma Voltage 4
56 GMA 3 Gamma Voltage 3
57 GMA 2 Gamma Voltage 2
58 GMA 1 Gamma Voltage 1
59
GND
Ground
60 ZOUT LTD Output
61
GND
Ground
62 VCOM_R Right Vcom Output
63 RVCOM_FB NC
64
GND
Ground
65
VGH
Gate High Voltage
66
GND
Ground
67
GSC
Gate Shift Clock
68
GOE
Gate Output Enable
69
GND
Ground
70
VGL
Gate Low Voltage
71 OPT_P “L” Normal Display / “H” Rotation Display
72
GND
Ground
73 HVDD Half Driver Power Supply Voltage
74 HVDD Half Driver Power Supply voltage
75
GND
Ground
76
VCC
Logic Power Supply Voltage
77
VCC
Logic Power Supply Voltage
78
GND
Ground
79
VDD
Driver Power Supply Voltage
80
VDD
Driver Power Supply Voltage
Note : 1. Please refer to application note (Half VDD & Gamma Voltage setting) for details.
Source Right PCB
CN 2
#1 #80
CN 1
#1 #80
Source Left PCB
Ver. 0.1
10 /39

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