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PDF LC420EUS-SCA1 Data sheet ( Hoja de datos )

Número de pieza LC420EUS-SCA1
Descripción WUXGA TFT LCD
Fabricantes LG 
Logotipo LG Logotipo



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Product Specification
SPECIFICATION
FOR
APPROVAL
LC420EUS
( ) Preliminary Specification
( ) Final Specification
Title
BUYER
MODEL
General
42.0” WUXGA TFT LCD
SUPPLIER
LG.Display Co., Ltd.
*MODEL
LC420EUS
SUFFIX
SCA1 (RoHS Verified)
*When you obtain standard approval,
please use the above model name without suffix
APPROVED BY
/
SIGNATURE
DATE
APPROVED BY
J. T Eo / Team Leader
SIGNATURE
DATE
REVIEWED BY
/ S. W Yu / Project Leader
/
Please return 1 copy for your confirmation with
your signature and comments.
Ver. 1.0
PREPARED BY
J. T Jung / Engineer
TV Products Development Dept.
LG. Display LCD Co., Ltd
0 /35

1 page




LC420EUS-SCA1 pdf
Product Specification
LC420EUS
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or damage to the
LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Min Max
Unit Note
Logic Power Voltage
VCC
-0.5
+4.0
VDC
Gate High Voltage
VGH
+18.0
+30.0
VDC
Gate Low Voltage
VGL
-8.0
-4.0
VDC
Source D-IC Analog Voltage
VDD
-0.3
+18.0
VDC
1
Gamma Ref. Voltage (Upper)
VGMH ½VDD-0.5
VDD+0.5
VDC
Gamma Ref. Voltage (Low)
VGML
-0.3
½ VDD+0.5
VDC
LED Input Voltage
Panel Front Temperature
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Vf
TSUR
TOP
TST
HOP
-
-
0
-20
10
+180.0
+68
+50
+60
90
VDC
°C
°C
°C
%RH
4
2,3
Storage Humidity
HST 10
90 %RH
Note: 1. Ambient temperature condition (Ta = 25 ± 2 °C )
2. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature
should be Max 39 °C and no condensation of water.
3. Gravity mura can be guaranteed below 40condition.
4. The maximum operating temperature is based on the test condition that the surface temperature
of display area is less than or equal to 68 with LCD module alone in a temperature controlled
chamber. Thermal management should be considered in final product design to prevent the surface
temperature of display area from being over 68 . The range of operating temperature may
degrade in case of improper thermal management in final product design.
90%
60
60%
Wet Bulb
Temperature [°C]
50
40
30
20
10
0
40%
10%
Storage
Operation
Ver. 1.0
-20 0 10 20 30 40 50 60 70 80
Dry Bulb Temperature [°C]
4 /35

5 Page





LC420EUS-SCA1 arduino
Product Specification
LC420EUS
-LCD Connector (CN2): TF06L-80S-0.5SH (Manufactured by Hirose) or Equivalent
Table 4-2. MODULE CONNECTOR(CN2) PIN CONFIGURATION
No Symbol
Description
No Symbol
Description
1
GND
Ground
41
GSP
Gate Start Pulse
2
RRV5 -
Right Right Mini LVDS Receiver Signal(5-)
42
GND
Ground
3
RRV5 +
Right Right Mini LVDS Receiver Signal(5+)
43 GMA 18 Gamma Voltage 18
4
RRV4 -
Right Right Mini LVDS Receiver Signal(4-)
44 GMA 17 Gamma Voltage 17
5
RRV4 +
Right Right Mini LVDS Receiver Signal(4+)
45 GMA 16 Gamma Voltage 16
6
RRV3 -
Right Right Mini LVDS Receiver Signal(3-)
46 GMA 15 Gamma Voltage 15
7
RRV3 +
Right Right Mini LVDS Receiver Signal(3+)
47 GMA 14 Gamma Voltage 14
8
GND
Ground
48 GMA 13 Gamma Voltage 13
9 RRVCLK - Right Right Mini LVDS Receiver Clock(-)
49 GMA 12 Gamma Voltage 12
10 RRVCLK + Right Right Mini LVDS Receiver Clock(+)
50 GMA 10 Gamma Voltage 10
11
GND
Ground
51 GMA 9 Gamma Voltage 9
12
RRV2 -
Right Right Mini LVDS Receiver Signal(2-)
52 GMA 7 Gamma Voltage 7
13
RRV2 +
Right Right Mini LVDS Receiver Signal(2+)
53 GMA 6 Gamma Voltage 6
14
RRV1 -
Right Right Mini LVDS Receiver Signal(1-)
54 GMA 5 Gamma Voltage 5
15
RRV1 +
Right Right Mini LVDS Receiver Signal(1+)
55 GMA 4 Gamma Voltage 4
16
RRV0 -
Right Right Mini LVDS Receiver Signal(0-)
56 GMA 3 Gamma Voltage 3
17
RRV0 +
Right Right Mini LVDS Receiver Signal(0+)
57 GMA 2 Gamma Voltage 2
18
GND
Ground
58 GMA 1 Gamma Voltage 1
19
RLV5 -
Right Left Mini LVDS Receiver Signal(5-)
59
GND
Ground
20
RLV5 +
Right Left Mini LVDS Receiver Signal(5+)
60 ZOUT LTD Output
21
RLV4 –
Right Left Mini LVDS Receiver Signal(4-)
61
GND
Ground
22
RLV4 +
Right Left Mini LVDS Receiver Signal(4+)
62 VCOM_R Right Vcom Output
23
RLV3 -
Right Left Mini LVDS Receiver Signal(3-)
63 RVCOM_FB NC(TBD)
24
RLV3 +
Right Left Mini LVDS Receiver Signal(3+)
64
GND
Ground
25
GND
Ground
65
VGH
Gate High Voltage
26 RLVCLK - Right Left Mini LVDS Receiver Clock(-)
66
GND
Ground
27 RLVCLK + Right Left Mini LVDS Receiver Clock(+)
67
GSC
Gate Shift Clock
28
GND
Ground
68
GOE
Gate Output Enable
29
RLV2 -
Right Left Mini LVDS Receiver Signal(2-)
69
GND
Ground
30
RLV2 +
Right Left Mini LVDS Receiver Signal(2+)
70
VGL
Gate Low Voltage
31
RLV1 -
Right Left Mini LVDS Receiver Signal(1-)
71 OPT_P “L” Normal Display / “H” Rotation Display
32
RLV1 +
Right Left Mini LVDS Receiver Signal(1+)
72
GND
Ground
33
RLV0 -
Right Left Mini LVDS Receiver Signal(0-)
73 HVDD Half Driver Power Supply Voltage
34
RLV0 +
Right Left Mini LVDS Receiver Signal(0+)
74 HVDD Half Driver Power Supply voltage
35
GND
Ground
75
GND
Ground
36
OPT_N
“H” Normal Display / “L” Rotation Display
76
VCC
Logic Power Supply Voltage
37
H_CONV
Horizontal 2 Inversion Signal
77
VCC
Logic Power Supply Voltage
38
SOE
Source Output Enable
78
GND
Ground
39
GND
Ground
79
VDD
Driver Power Supply Voltage
40
POL
Polarity Output Signal
80
VDD
Driver Power Supply Voltage
Note : 1. Please refer to application note for details (Half VDD & Gamma Voltage setting).
Source Right PCB
CN 2
#1 #80
CN 1
#1 #80
Source Left PCB
Ver. 1.0
10 /35

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