DataSheet.es LC320EXJ-SEE1 Hoja de datos PDF


PDF LC320EXJ-SEE1 Datasheet ( Hoja de datos )

Número de pieza LC320EXJ-SEE1
Descripción WXGA TFT LCD
Fabricantes LG 
Logotipo LG Logotipo
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LC320EXJ-SEE1 datasheet

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LC320EXJ-SEE1 pdf
Global LCD Panel Exchange Center
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Product Specification
LC320EXJ
2. Absolute Maximum Ratings
The following items are maximum values which, if exceeded, may cause faulty operation or damage to the
LCD module.
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter
Power Input voltage
Panel Front Temperature
Operating Temperature
Storage Temperature
Operating Ambient Humidity
Storage Humidity
Symbol
VLCD
TSUR
TOP
TST
HOP
HST
Value
Min Max
-0.3 +14.0
- +68
0 +50
-20 +60
10 90
10 90
Unit
V [DC]
C
C
C
%RH
%RH
Remark
X
4
2,3
Note: 1. Ambient temperature condition (Ta = 25 r 2 C )
2. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature
should be Max 39 C and no condensation of water.
3. Gravity mura can be guaranteed below 40ć condition.
4. The maximum operating temperature is based on the test condition that the surface temperature
of display area is less than or equal to 68 ć with LCD module alone in a temperature controlled
chamber. Thermal management should be considered in final product design to prevent the surface
temperature of display area from being over 68 ć. The range of operating temperature may
degrade in case of improper thermal management in final product design.
90%
60
Wet Bulb
Temperature [C]
50
40
30
10
0
20
60%
40%
10%
-20 0 10 20 30 40 50 60 70 80
Dry Bulb Temperature [C]
Ver. 1.0
Storage
Operation
5 /34
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LC320EXJ-SEE1 arduino
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Product Specification
3-4-2. LVDS Input Signal Characteristics
1) DC Specification
LVDS -
LC320EXJ
LVDS +
# V CM = {( LVDS +) + ( LVDS - )} /2
0V
Description
Symbol
Min
LVDS Common mode Voltage
LVDS Input Voltage Range
Change in common mode Voltage
VCM
VIN
ǻVCM
1.0
0.7
-
2) AC Specification
Tclk
V CM
V IN _ MAX V IN _ MIN
Max Unit
1.5 V
1.8 V
250 mV
Note
-
-
-
LVDS Clock
LVDS Data
A
LVDS 1’st Clock
LVDS 2nd / 3rd / 4th Clock
t tSKEW SKEW
( Fclk = 1 /Tclk )
Tclk
tSKEW_min tSKEW_max
Description
Symbol Min
Max Unit
LVDS Differential Voltage
High Threshold
VTH
100
300 mV
Low Threshold VTL -300 -100 mV
LVDS Clock to Data Skew
tSKEW
- |(0.20*Tclk)/7| ps
LVDS Clock/DATA Rising/Falling time
tRF 260 |(0.3*Tclk)/7| ps
Effective time of LVDS
teff |·360|
-
ps
LVDS Clock to Clock Skew (Even to Odd)
tSKEW_EO
-
|1/7* Tclk|
ps
Note 1. All Input levels of LVDS signals are based on the EIA 644 Standard.
2. If tRF isn’t enough, teff should be meet the range.
3. LVDS Differential Voltage is defined within teff
Ver. 1.0
A
80%
20%
tRF
Note
3
-
2
-
-
10 /34
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