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PDF SAM7S321 Data sheet ( Hoja de datos )

Número de pieza SAM7S321
Descripción ARM-based Flash MCU
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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No Preview Available ! SAM7S321 Hoja de datos, Descripción, Manual

AT91SAM
ARM-based Flash MCU
SAM7S512 SAM7S256 SAM7S128 SAM7S64
SAM7S321 SAM7S32 SAM7S161 SAM7S16
Features
Incorporates the ARM7TDMI® ARM® Thumb® Processor
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– EmbeddedICEIn-circuit Emulation, Debug Communication Channel Support
Internal High-speed Flash
– 512 Kbytes (SAM7S512) Organized in Two Contiguous Banks of 1024 Pages of 256
Bytes (Dual Plane)
– 256 Kbytes (SAM7S256) Organized in 1024 Pages of 256 Bytes (Single Plane)
– 128 Kbytes (SAM7S128) Organized in 512 Pages of 256 Bytes (Single Plane)
– 64 Kbytes (SAM7S64) Organized in 512 Pages of 128 Bytes (Single Plane)
– 32 Kbytes (SAM7S321/32) Organized in 256 Pages of 128 Bytes (Single Plane)
– 16 Kbytes (SAM7S161/16) Organized in 256 Pages of 64 Bytes (Single Plane)
– Single Cycle Access at Up to 30 MHz in Worst Case Conditions
– Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
– Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms
– 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, Flash
Security Bit
– Fast Flash Programming Interface for High Volume Production
Internal High-speed SRAM, Single-cycle Access at Maximum Speed
– 64 Kbytes (SAM7S512/256)
– 32 Kbytes (SAM7S128)
– 16 Kbytes (SAM7S64)
– 8 Kbytes (SAM7S321/32)
– 4 Kbytes (SAM7S161/16)
Memory Controller (MC)
– Embedded Flash Controller, Abort Status and Misalignment Detection
Reset Controller (RSTC)
– Based on Power-on Reset and Low-power Factory-calibrated Brown-out Detector
– Provides External Reset Signal Shaping and Reset Source Status
Clock Generator (CKGR)
– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL
Power Management Controller (PMC)
– Software Power Optimization Capabilities, Including Slow Clock Mode (Down to 500
Hz) and Idle Mode
– Three Programmable External Clock Signals
Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Two (SAM7S512/256/128/64/321/161) or One (SAM7S32/16) External Interrupt Source(s)
and One Fast Interrupt Source, Spurious Interrupt Protected
6175M–ATARM–26-Oct-12

1 page




SAM7S321 pdf
Figure 2-2. SAM7S32/16 Block Diagram
TDI
TDO
TMS
TCK
JTAGSEL
TST
FIQ
IRQ0
PCK0-PCK2
PLLRC
XIN
XOUT
VDDCORE
VDDCORE
NRST
DRXD
DTXD
RXD0
TXD0
SCK0
RTS0
CTS0
NPCS0
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
ADTRG
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
ADVREF
JTAG
SCAN
ICE
System Controller
ARM7TDMI
Processor
1.8 V
Voltage
Regulator
AIC
PLL
OSC
PMC
RCOSC
BOD
POR
Reset
Controller
PIT
WDT
RTT
DBGU
PDC
PDC
PIOA
Memory Controller
Embedded
Flash
Controller
Address
Decoder
Abort
Status
Misalignment
Detection
Peripheral Bridge
Peripheral DMA
Controller
9 Channels
APB
SRAM
8/4 Kbytes
Flash
32/16 Kbytes
ROM
Fast Flash
Programming
Interface
SAM-BA
USART0
PDC
PDC
PDC
SPI
PDC
PDC
ADC
PWMC
PDC
SSC
PDC
Timer Counter
TC0
TC1
TC2
TWI
VDDIN
GND
VDDOUT
VDDCORE
VDDIO
VDDFLASH
ERASE
PGMRDY
PGMNVALID
PGMNOE
PGMCK
PGMM0-PGMM3
PGMD0-PGMD7
PGMNCMD
PGMEN0-PGMEN2
PWM0
PWM1
PWM2
PWM3
TF
TK
TD
RD
RK
RF
TCLK0
TIOA0
TIOB0
TIOA1
TIOB1
TWD
TWCK
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
5

5 Page





SAM7S321 arduino
4.3 48-lead LQFP and 48-pad QFN Package Outlines
Figure 4-3 and Figure 4-4 show the orientation of the 48-lead LQFP and the 48-pad QFN package. A detailed
mechanical description is given in the section Mechanical Characteristics of the full datasheet.
Figure 4-3. 48-lead LQFP Package (Top View)
36
37
25
24
48
1
Figure 4-4. 48-pad QFN Package (Top View)
36
37
13
12
25
24
48
1
13
12
4.4 48-lead LQFP and 48-pad QFN Pinout
Table 4-2. SAM7S32/16 Pinout(1)
1 ADVREF
13 VDDIO
25 TDI
2 GND
14 PA16/PGMD4
26 PA6/PGMNOE
3 AD4
15 PA15/PGMD3
27 PA5/PGMRDY
4 AD5
16 PA14/PGMD2
28 PA4/PGMNCMD
5 AD6
17 PA13/PGMD1
29 NRST
6 AD7
18 VDDCORE
30 TST
7 VDDIN
19 PA12/PGMD0
31
PA3
8 VDDOUT
20 PA11/PGMM3
32 PA2/PGMEN2
9 PA17/PGMD5/AD0
21 PA10/PGMM2
33 VDDIO
10 PA18/PGMD6/AD1
22 PA9/PGMM1
34
GND
11 PA19/PGMD7/AD2
23 PA8/PGMM0
35 PA1/PGMEN1
12 PA20/AD3
24 PA7/PGMNVALID
36 PA0/PGMEN0
Note: 1. The bottom pad of the QFN package must be connected to ground.
37 TDO
38 JTAGSEL
39 TMS
40 TCK
41 VDDCORE
42 ERASE
43 VDDFLASH
44 GND
45 XOUT
46 XIN/PGMCK
47 PLLRC
48 VDDPLL
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
11

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