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PDF S-75V00ANC Data sheet ( Hoja de datos )

Número de pieza S-75V00ANC
Descripción Single 2-Input NAND Gate
Fabricantes Seiko 
Logotipo Seiko Logotipo



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No Preview Available ! S-75V00ANC Hoja de datos, Descripción, Manual

S-75V00ANC
www.sii-ic.com
© Seiko Instruments Inc., 1999-2014
MINI LOGIC SERIES
2 INPUT NAND GATE
Rev.4.0_00
The S-75V00ANC is a single 2-Input NAND Gate fabricated by utilizing advanced silicon-gate CMOS technology which
provides the inherent benefit of CMOS low power consumption to achieve ultra high speed operation correspond to LSTTL
IC’s.
All gates of the internal circuitry have buffered outputs to ensure high noise immunity and output stability.
Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin
and VCC.
This allows for interfaces between power supplies of different voltage, output level conversion from 5 V to 3 V and battery
backup applications.
Features
Wide power supply range:
Low current consumption:
Typical propagation delay:
High noise immunity:
Power down protection:
Lead-free
2 V to 5.5 V
1.0 μA max. (at 5.5 V, 25°C)
tPD = 3.7 ns (at 5 V)
VNIH = VNIL = 28% VCC min.
All pins
Applications
Personal computers, peripherals
Cellular phones
Cameras
Games
Package
SC-88A
Pin Configuration
Marking Specification
IN B 1
IN A 2
5 VCC
54
5V1
Product code
GND 3
4 OUT Y
(Top view)
Logic Diagram
IN B
IN A OUT Y
1 23
(Top view)
True values
A
L
L
H
H
B
L
H
L
H
Y
H
H
H
L
Seiko Instruments Inc.
1

1 page




S-75V00ANC pdf
S-75V02ANC
www.sii-ic.com
© Seiko Instruments Inc., 1999-2014
MINI LOGIC SERIES
2 INPUT NOR GATE
Rev.4.0_00
The S-75V02ANC is a single 2-input NOR gate fabricated by utilizing advanced silicon-gate CMOS technology which
provides the inherent benefit of CMOS low power consumption to achieve ultra high speed operation correspond to LSTTL
IC’s.
All gates of the internal circuitry have buffered outputs to ensure high noise immunity and output stability.
Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin
and VCC.
This allows for interfaces between power supplies of different voltage, output level conversion from 5 V to 3 V and battery
backup applications.
Features
Wide power supply range:
Low current consumption:
Typical propagation delay:
High noise immunity:
Power down protection:
Lead-free
2 V to 5.5 V
1.0 μA max. (at 5.5 V, 25°C)
tPD = 3.6 ns (at 5 V)
VNIH = VNIL = 28% VCC min.
All pins
Applications
Personal computers, peripherals
Cellular phones
Cameras
Games
Package
SC-88A
Pin Configuration
Marking Specification
IN B 1
IN A 2
5 VCC
54
5V3
Product code
GND 3
(Top view)
4 OUT Y
1 23
(Top view)
Logic Diagram
IN B
IN A
OUT Y
True values
A
L
L
H
H
B
L
H
L
H
Y
H
L
L
L
Seiko Instruments Inc.
5

5 Page





S-75V00ANC arduino
Rev.4.0_00
MINI LOGIC SERIES INVERTER
S-75V04ANC
Recommended Operating Conditions
Item
Power voltage
Input voltage
Output voltage
Input rise / fall time
Symbol
VCC
VIN
VOUT
tR, tF
Standard
2 to 5.5
0 to 5.5
0 to VCC
0 to 100 (VCC = 3.3±0.3 V)
0 to 20 (VCC = 5±0.5 V)
Unit
V
V
V
ns
ns
DC Electrical Characteristics
Item Symbol
Input
voltage
“H” level VIH
“L” level VIL
Conditions
Output
voltage
“H” level VOH
“L” level VOL
Input current
IIN
Current consumption ICC
VIN = VIL
IOH = 50 μA
IOH = 4 mA
IOH = 8 mA
IOL = 50 μA
VIN = VIH
IOL = 4 mA
IOL = 8 mA
VIN = 5.5 V or GND
VIN = VCC or GND
VCC
2.0
3 to 5.5
2.0
3 to 5.5
2.0
3.0
4.5
3.0
4.5
2.0
3.0
4.5
3.0
4.5
0 to 5.5
5.5
Ta = 25°C
Min. Typ. Max.
1.5
VCC×0.7
0.5
⎯ ⎯ VCC×0.3
1.9 2.0
2.9 3.0
4.4 4.5
2.58
3.94
0 0.1
0 0.1
0 0.1
⎯ ⎯ 0.36
⎯ ⎯ 0.36
⎯ ⎯ ±0.1
⎯ ⎯ 1.0
Ta = 40 to 85°C
Min. Max.
1.5
VCC×0.7
0.5
VCC×0.3
1.9
2.9
4.4
2.48
3.80
0.1
0.1
0.1
0.44
0.44
⎯ ±1.0
10.0
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
μA
μA
Seiko Instruments Inc.
11

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