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PDF KSZ8041RNL Data sheet ( Hoja de datos )

Número de pieza KSZ8041RNL
Descripción 10Base-T/100Base-TX Physical Layer Transceiver
Fabricantes Micrel Semiconductor 
Logotipo Micrel Semiconductor Logotipo



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KSZ8041NL/RNL
10Base-T/100Base-TX
Physical Layer Transceiver
Revision 1.5
General Description
The KSZ8041NL is a single supply 10Base-T/100Base-TX
physical layer transceiver, which provides MII/RMII
interfaces to transmit and receive data. A unique mixed
signal design extends signaling distance while reducing
power consumption.
HP Auto MDI/MDI-X provides the most robust solution for
eliminating the need to differentiate between crossover
and straight-through cables.
The KSZ8041NL represents a new level of features and
performance and is an ideal choice of physical layer
transceiver for 10Base-T/100Base-TX applications.
The KSZ8041RNL is an enhanced RMII version of the
KSZ8041NL that does not require a 50MHz system clock.
It uses a 25MHz crystal for its input reference clock and
outputs a 50MHz RMII reference clock to the MAC.
The KSZ8041NL and KSZ8041RNL are available in 32-
pin, lead-free QFN packages (see Ordering Information).
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
Functional Diagram
KSZ8041NL
TX+ 10/100
Transmitter Pulse
TX- Shaper
REXT
Adaptive EQ
RX+ Base Line
Wander Correction
RX- MLT3 Decoder
NRZI/NRZ
10Base-T
Receiver
NRZ/NRZI
MLT3 Encoder
4B/5B Encoder
Scrambler
Parallel/Serial
Parallel/Serial
Manchester Encoder
Clock
Recovery
4B/5B Decoder
Descrambler
Serial/Parallel
Auto
Negotiation
Manchester Decoder
Serial/Parallel
MDC
MDIO
TX_EN
TXD1
TXD0
RMII CRS_DV
RXD1
RXD0
RX_ER
REF_CLK
INTRP
XI
PLL
XO
Power Down
Power Saving
RST#
LED LED0
Driver LED1
KSZ8041RNL
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
February 4, 2015
Revision 1.5

1 page




KSZ8041RNL pdf
Micrel, Inc.
KSZ8041NL/RNL
Contents
List of Figures.......................................................................................................................................................................... 7
List of Tables ........................................................................................................................................................................... 8
Pin Configuration KSZ8041NL ............................................................................................................................................. 9
Pin Description KSZ8041NL .............................................................................................................................................. 10
Strapping Options KSZ8041NL.......................................................................................................................................... 14
Pin Configuration KSZ8041RNL ........................................................................................................................................ 15
Pin Description KSZ8041RNL............................................................................................................................................ 16
Strapping Options KSZ8041RNL ....................................................................................................................................... 19
Functional Description........................................................................................................................................................... 20
100Base-TX Transmit........................................................................................................................................................ 20
100Base-TX Receive......................................................................................................................................................... 20
PLL Clock Synthesizer ...................................................................................................................................................... 20
Scrambler/De-Scrambler (100Base-TX only).................................................................................................................... 20
10Base-T Transmit ............................................................................................................................................................ 20
10Base-T Receive ............................................................................................................................................................. 21
SQE and Jabber Function (10Base-T only) ...................................................................................................................... 21
Auto-Negotiation ................................................................................................................................................................ 21
MII Management (MIIM) Interface ..................................................................................................................................... 23
Interrupt (INTRP) ............................................................................................................................................................... 23
MII Data Interface (KSZ8041NL only) ............................................................................................................................... 23
MII Signal Definition (KSZ8041NL only) ............................................................................................................................ 24
Transmit Clock (TXC) .................................................................................................................................................... 24
Transmit Enable (TXEN)................................................................................................................................................ 24
Transmit Data [3:0] (TXD[3:0])....................................................................................................................................... 24
Receive Clock (RXC) ..................................................................................................................................................... 24
Receive Data Valid (RXDV) ........................................................................................................................................... 25
Receive Data [3:0] (RXD[3:0]) ....................................................................................................................................... 25
Receive Error (RXER).................................................................................................................................................... 25
Carrier Sense (CRS)...................................................................................................................................................... 25
Collision (COL)............................................................................................................................................................... 25
Reduced MII (RMII) Data Interface................................................................................................................................ 25
RMII Signal Definition ........................................................................................................................................................ 26
Reference Clock (REF_CLK)......................................................................................................................................... 26
Transmit Enable (TX_EN).............................................................................................................................................. 26
Transmit Data [1:0] (TXD[1:0])....................................................................................................................................... 26
Carrier Sense/Receive Data Valid (CRS_DV) ............................................................................................................... 27
Receive Data [1:0] (RXD[1:0]) ....................................................................................................................................... 27
Receive Error (RX_ER).................................................................................................................................................. 27
Collision Detection ......................................................................................................................................................... 27
February 4, 2015
5
Revision 1.5

5 Page





KSZ8041RNL arduino
Micrel, Inc.
KSZ8041NL/RNL
Pin Description KSZ8041NL (Continued)
Pin
Number
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
Pin
Name
RXD1 /
RXD[1] /
PHYAD2
RXD0 /
RXD[0] /
DUPLEX
VDDIO_3.3
RXDV /
CRSDV /
CONFIG2
RXC
RXER /
RX_ER /
ISO
INTRP
TXC
TXEN /
TX_EN
TXD0 /
TXD[0]
TXD1 /
TXD[1]
TXD2
TXD3
COL /
CONFIG0
CRS /
CONFIG1
Type(2)
Ipd/O
Ipu/O
P
Ipd/O
O
Ipd/O
Opu
O
I
I
I
I
I
Ipd/O
Ipd/O
Pin Function
MII Mode: Receive Data Output[1](3)/.
RMII Mode: Receive Data Output[1](4) /.
Config Mode: The pull-up/pull-down value is latched as PHYADDR[2] during power-up /
reset. See Strapping Options KSZ8041NL for details.
MII Mode: Receive Data Output[0](3)/.
RMII Mode: Receive Data Output[0](4) /.
Config Mode: Latched as DUPLEX (register 0h, bit 8) during power-up / reset. See
Strapping Options KSZ8041NL for details.
3.3V Digital VDD.
MII Mode: Receive Data Valid Output /.
RMII Mode: Carrier Sense/Receive Data Valid Output /.
Config Mode: The pull-up/pull-down value is latched as CONFIG2 during power-up / reset.
See Strapping Options KSZ8041NL for details.
MII Mode: Receive Clock Output.
MII Mode: Receive Error Output.
RMII Mode: Receive Error Output.
Config Mode: The pull-up/pull-down value is latched as ISOLATE during power-up / reset.
See Strapping Options KSZ8041NL for details.
Interrupt Output: Programmable Interrupt Output
Register 1Bh is the Interrupt Control/Status Register for programming the interrupt
conditions and reading the interrupt status. Register 1Fh bit 9 sets the interrupt output to
active low (default) or active high.
MII Mode: Transmit Clock Output.
MII Mode: Transmit Enable Input /.
RMII Mode: Transmit Enable Input.
MII Mode: Transmit Data Input[0](5) /.
RMII Mode: Transmit Data Input[0](6).
MII Mode: Transmit Data Input[1](5) /.
RMII Mode: Transmit Data Input[1](6).
MII Mode: Transmit Data Input[2](5) /.
MII Mode: Transmit Data Input[3](5) /.
MII Mode: Collision Detect Output /.
Config Mode: The pull-up/pull-down value is latched as CONFIG0 during power-up / reset.
See Strapping Options KSZ8041NL for details.
MII Mode: Carrier Sense Output /.
Config Mode: The pull-up/pull-down value is latched as CONFIG1 during power-up / reset.
See Strapping Options KSZ8041NL for details.
February 4, 2015
11
Revision 1.5

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