|
|
PDF THCV219 Data sheet ( Hoja de datos )
| Número de pieza | THCV219 | |
| Descripción | HS High-speed video data transmitter | |
| Fabricantes | THine Electronics | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de THCV219 (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
|
No Preview Available !
THCV219
V-by-One® HS High-speed video data transmitter
General Description
THCV219 is designed to support video data
transmission between the host and display.
One high-speed lane can carry up to 32bit data and
3 bits of synchronizing signals at a pixel clock
frequency from 7.5MHz to 75MHz.
It has one high-speed data lane and, maximum
serial data rate is 3.0Gbps/lane.
Width Link
TTL Clock Freq.
24bit Si/So 10MHz to 100MHz
32bit Si/So 7.5MHz to 75MHz
Si/So : Single-in/Single-out,
Features
Color depth selectable: 24(8*3)/32(10*3)bit
Single Link
AC coupling for high speed lines
Wide Range Supply Voltage 2.3~3.6V
Package: 64 pin QFN
Wide frequency range
Spread Spectrum Clocking tolerant
Up to 30kHz/0.5% (center spread)
V-by-One® HS standard Version1.4 compliant
AEC-Q100 ESD Protection
Block Diagram
R9-R0
G9-G0
B9-B0
CONT2,CONT1
HSYNC
VSYNC
DE
ASYNDE
CLKIN
COL
LFSEL
BET
PDN
RF
CMLDRV
PRE
AVCC
VCC
THCV219
Controls
LDO
TXp
TXn
HTPDN
LOCKN
CAPOUT
CAPINA
CAPINP
THCV219_Rev.2.20_E
Copyright©2016 THine Electronics, Inc.
1/17
THine Electronics, Inc.
Security E
1 page  
Functional Description
Functional Overview
With V-by-One® HS proprietary encoding scheme and CDR (Clock and Data Recovery) architecture,
THCV219 enables transmission of 8/10 bit RGB, 2bits of user-defined data (CONT), synchronizing signals
HSYNC, VSYNC, and DE by a pair cable with minimal external components.
THCV219 inputs CMOS/TTL data (including video data, CONT, HSYNC, VSYNC, and DE) and serializes
video data and synchronizing signals separately, depending on the polarity of DE. DE is a signal which indicates
whether video or synchronizing data are active. When DE is high, it serializes video data inputs into differential
data streams. And it transmits serialized synchronizing data when DE is low.
THCV219 can operate for a wide range of a serial bit rate from 600Mbps to 3.0Gbps.
It does not need any external frequency reference, such as a crystal oscillator.
Internal Reference Output/Input Function (CAPOUT,CAPINA,CAPINP)
An internal regulator produces the 1.2V (CAPOUT). This 1.2V linear regulator can not supply any other
external loads. Bypass CAPOUT to GND with 2.2uF.
CAPINP supplies reference voltage for internal PLL, and CAPINA supplies reference voltage for any internal
analog circuit. Bypass CAPINP/CAPINA to GND with 0.1uF to remove high frequency noise. CAPOUT,
CAPINA and CAPINP must be tied together.
Analog power supply AVCC is supposed to be stabilized with de-coupling capacitor and series noise filter (for
example, ferrite bead).
Power
Supply
THCV219
AVCC
CAPOUT
CAPINA
CAPINP
2.2uF
0.1uF
0.1uF
Figure 1. Connection of CAPOUT, CAPINA, CAPINP and Decoupling Capacitor
THCV219_Rev.2.20_E
Copyright©2016 THine Electronics, Inc.
5/18
THine Electronics, Inc.
Security E
5 Page 
symbol
VTOD
Parameter
CML Differential Mode Output Voltage
PRE
CML Pre-emphasis Level
VTOC
ITOH
ITOS
CML Common Mode Output Voltage
CML Output Leak Current High
CML Output Short Circuit Current
CML DC Specifications
Over recommended operating supply and temperature ranges unless otherwise specified.
conditions
min.
typ.
max.
Unit
CMLDRV=L
133 200 267 mV
CMLDRV=H
200 300 400 mV
PRE=L
0%
PRE=H, CMLDRV=L 100 %
PRE=H, CMLDRV=H 50 %
PRE=L
1.2 - VTOD
V
PRE=H, CMLDRV=L
1.2 - 2 * VTOD
V
PRE=H, CMLDRV=H
1.2 - 1.5 * VTOD
V
PDN=L, TXP/N=1.2V
±30 uA
PDN=L, TXP/N=0V
-80
mA
symbol
ITCCW
ITCCS
Parameter
Transmitter Supply Current
Transmitter Power Down
Supply Current
Supply Currents
Over recommended operating supply and temperature ranges unless otherwise specified.
conditions
min.
typ.
max.
Unit
COL=L
PRE=H
100 mA
PDN=L
All Inputs =Fixed LorH
1.2 10 mA
symbol
tTRF
tTCIP
tTCH
tTCL
tTS
tTH
tTCD
tTPD
tTPLL0
tTPLL1
tTNP0
tTNP1
Switching Characteristics
Parameter
CML Output Rise and Fall Time(20%-80%)
CLKIN Period
CLK IN High Time
CLK IN Low Time
TTL Data Setup to CLK IN
TTL Data Hold to CLK IN
Input Clock to Output Data Delay
Power On to PDN High Delay
PDN High to CML Output Delay
PDN Low to CML Output High Fix Delay
LOCKN High to Training Pattern Output Delay
LOCKN Low to Data Pattern Output Delay
Over recommended operating supply and temperature ranges unless otherwise specified.
conditions
min.
typ.
max.
Unit
50 150 ps
COL=H, LFSEL=L
10
50 ns
COL=H, LFSEL=H
25
100 ns
COL=L, LFSEL=L
13.34
66.66
ns
COL=L, LFSEL=H
33.34
133.33
ns
0.35tTCIP
0.5tTCIP
0.65tTCIP
ns
0.35tTCIP
0.5tTCIP
0.65tTCIP
ns
2.0 ns
0.6 ns
COL=H
typ. - tTCIP
10.6tTCIP+1.7
typ. + tTCIP
ns
COL=L
typ. - tTCIP
9.8tTCIP+1.7
typ. + tTCIP
ns
0 ns
10 ms
20 ns
10 ms
10 ms
THCV219_Rev.2.20_E
Copyright©2016 THine Electronics, Inc.
11/18
THine Electronics, Inc.
Security E
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet THCV219.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| THCV213 | LVDS SerDes transmitter and receiver | THine Electronics |
| THCV214 | LVDS SerDes transmitter and receiver | THine Electronics |
| THCV215 | HS High-speed Video Data Transmitter and Receiver | THine Electronics |
| THCV216 | HS High-speed Video Data Transmitter and Receiver | THine Electronics |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |