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PDF TC14433 Data sheet ( Hoja de datos )

Número de pieza TC14433
Descripción 3-1/2 DIGIT A/D CONVERTERS
Fabricantes TelCom Semiconductor 
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TC14433
TC14433A
3-1/2 DIGIT A/D CONVERTERS
FEATURES
s Accuracy ................... ±0.05% of Reading ±1 Count
s Two Voltage Ranges ............. 1.999V and 199.9 mV
s Up to 25 Conversions Per Second
s ZIN > 1000M Ohms
s Single Positive Voltage Reference
s Auto-Polarity and Auto-Zero
s Overrange and Underrange Signals Available
s Operates in Auto-Ranging Circuits
s Uses On-Chip System Clock or External Clock
s Wide Supply Range .................... e.g., ±4.5V to ±8V
s Package Available .................................. 24-Pin DIP
24-Pin CerDIP, 28-Pin SOIC and 28-Pin PLCC
APPLICATIONS
s Portable Instruments
s Digital Voltmeters
s Digital Panel Meters
s Digital Scales
s Digital Thermometers
s Remote A/D Sensing Systems
s MPU Systems
s See Application Notes 19 and 21
FUNCTIONAL BLOCK DIAGRAM
RC
10 11
CLK1 CLK0
MULTIPLEXER
LATCHES
GENERAL DESCRIPTION
The TC14433 is a low power, high-performance, mono-
lithic CMOS 3-1/2 digit A/D converter. The TC14433 com-
bines both analog and digital circuits on a single IC, thus
minimizing the number of external components. This dual-
slope A/D converter provides automatic polarity and zero
correction with the addition of two external resistors and two
capacitors. The full-scale voltage range of this ratiometric IC
extends from 199.9 millivolts to 1.999 volts. The TC14433
can operate over a wide range of power supply voltages,
including batteries and standard 5-volt supplies.
The TC14433 will interface with the TC7211A LCD
display driver.
The TC14433A features improved performance over
the industry standard TC14433. Rollover, which is the
measurement of identical positive and negative signals, is
guaranteed to have the same reading within one count for
the TC14433A. Power consumption of the TC14433A is
typically 4 mW, approximately one-half that of the industry
standard TC14433.
ORDERING INFORMATION
Part No.
TC14433AEJG
TC14433AELI
TC14433AEPG
TC14433COG
TC14433EJG
TC14433ELI
TC14433EPG
Package
24-Pin CerDIP
28-Pin PLCC
24-Pin Plastic DIP
24-Pin SOIC
24-Pin CerDIP
28-Pin PLCC
24-Pin Plastic DIP
Temp.Range
– 40°C to +85°C
– 40°C to +85°C
– 40°C to +85°C
0°C to +70°C
– 40°C to +85°C
– 40°C to +85°C
– 40°C to +85°C
20–23
16–19
Q0 – Q3
BCD DATA
DS1 –DS4
DIGIT STROBE
POLARITY DETECT
2
3
4
5
6
CLOCK
1'S
10'S
100'S
1,000'S
7
OVERFLOW
15 OR OVERRANGE
CONTROL
LOGIC
CMOS
ANALOG
SUBSYSTEM
4
R1
DISPLAY
END OF
UPDATE 9 14 CONVERSION
DU EOC
5
R1 / C1
6
C1
INTEGRATOR
7
CO1
8
CO2
OFFSET
2
1
3
VREF REFERENCE VOLTAGE
VAG ANALOG GROUND
VX ANALOG INPUT
VDD = PIN 24
VSS = PIN 13
VEE = PIN 12
TELCOM SEMICONDUCTOR, INC.
8
TC14433/A-6 10/21/96
3-127

1 page




TC14433 pdf
3-1/2 DIGIT A/D CONVERTERS
1
TC14433
TC14433A
PIN DESCRIPTIONS (Cont.)
Pin No. Pin No.
24-Pin 24-Pin
PDIP/CerDip SOIC
16 16
Pin No.
28-Pin
PLCC
19
17 17 20
18 18 21
19 19 23
20 20 24
21 21 25
22 22 26
23 23 28
24 24 28
8,15, 22
Symbol
DS4
DS3
DS2
DS1
Q0
Q1
Q2
Q3
VDD
NC
Description
Digit select pins — The digit select output goes high when the respective digit
is selected. The MSD (1/2 digit) turns on immediately after an EOC pulse.
The remaining digits turn on in sequence from MSD to LSD.
To ensure that the BCD data has settled, an inter-digit blanking time of two
clock periods is included.
Clock frequency divided by 80 equals multiplex rate. For example, a system
clock of 60 kHz gives a multiplex rate of 0.8 kHz.
See Figure 12 for digit select timing diagram.
BCD data output pins — Multiplexed BCD outputs contain three full digits of
information during digit select DS2, DS3, DS4.
During DS1, the 1/2 digit, overrange, underrange and polarity information is
available.
Refer to truth table.
Positive power supply — This is the most positive power supply pin.
Not Used.
2
3
4
CIRCUIT DESCRIPTION
The TC14433 CMOS IC becomes a modified dual-
slope A/D with a minimum of external components. This IC
has the customary CMOS digital logic circuitry, as well as
CMOS analog circuitry. It provides the user with digital
functions (such as counters, latches, multiplexers) and
analog functions (such as operational amplifiers and com-
parators) on a single chip.
Features of this system include auto-zero, high input
impedances and auto-polarity. Low power consumption
and a wide range of power supply voltages are also advan-
tages of this CMOS device. The system's auto-zero function
compensates for the offset voltage of the internal amplifiers
and comparators. In this "ratiometric system," the output
reading is the ratio of the unknown voltage to the reference
voltage, where a ratio of 1 is equal to the maximum count of
1999. It takes approximately 16,000 clock periods to com-
plete one conversion cycle. Each conversion cycle may be
divided into 6 segments. Figure 7 shows the conversion
cycle in 6 segments for both positive and negative inputs.
Segment 1 — The offset capacitor (CO), which com-
pensates for the input offset voltages of the buffer and
integrator amplifiers, is charged during this period. How-
ever, the integrator capacitor is shorted. This segment
requires 4000 clock periods.
Segment 2 — During this segment, the integrator
output decreases to the comparator threshold voltage. At
this time, a number of counts equivalent to the input offset
TELCOM SEMICONDUCTOR, INC.
voltage of the comparator is stored in the offset latches for
later use in the auto-zero process. The time for this segment
is variable and less than 800 clock periods.
5
START
TIME
SEGMENT
NUMBER
12
3
END
456
VX
TYPICAL
POSITIVE
INPUT
VOLTAGE
VX
TYPICAL
NEGATIVE
INPUT
VOLTAGE
6
Figure 7. Integrator Waveforms at Pin 6
BUFFER
VX +
C1
R1
INTEGRATOR
COMPARATOR
+
+
7
Figure 8. Equivalent Circuit Diagrams of the Analog
Section During Segment 4 of the Timing Cycle
3-131
8

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