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PDF FXMAR2104 Data sheet ( Hoja de datos )
| Número de pieza | FXMAR2104 | |
| Descripción | 4-Bit Voltage Translator / Isolator | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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July 2012
FXMAR2104
Dual-Supply, 4-Bit Voltage Translator / Isolator for
Open-Drain and Push-Pull Applications
Features
Bi-Directional Interface between Any Two Levels:
1.65V to 5.5V
Direction Control Not Needed
Internal 10KΩ Pull-Up Resistors
System GPIO Resources Not Required when OE
Tied to VCCA
I2C-Bus® Isolation
A/B Port VOL = 175mV (Typical), VIL = 150mV,
IOL = 6mA
Open-Drain Inputs / Outputs
Works in a Push-Pull Environment
Accommodates Standard-Mode and Fast-Mode
I2C-Bus Devices
Supports I2C Clock Stretching & Multi-Master
Fully Configurable: Inputs and Outputs Track VCC
Non-Preferential Power-Up; Either VCC May Be
Powered-Up First
Outputs Switch to 3-State if Either VCC is at GND
Tolerant Output Enable: 5V
Packaged in 12-Lead Ultrathin MLP
(1.8mm x 1.8mm)
ESD Protection Exceeds:
- 5kV HBM (per JESD22-A114)
- 2kV CDM (per JESD22-C101)
Description
The FXMAR2104 is a 4-bit high-performance,
configurable dual-voltage supply, open-drain translator
for bi-directional voltage translation over a wide range of
input and output voltages levels. The FXMAR2104 also
works in a push-pull environment.
Intended for use as a voltage translator in applications
using the I2C-Bus® interface, the input and output
voltage levels are compatible with I2C device
specification voltage levels. Eight internal 10KΩ pull-up
resistors are integrated.
The device is designed so that the A port tracks the
VCCA level and the B port tracks the VCCB level. This
allows for bi-directional A/B port voltage translation
between any two levels from 1.65V to 5.5V. VCCA can
equal VCCB from 1.65V to 5.5V.
Non-preferential power-up means VCC can be powered-
up first. Internal power-down control circuits place the
device in 3-state if either VCC is removed.
The two ports of the device have automatic direction-
sense capability. Either port may sense an input signal
and transfer it as an output signal to the other port.
Ordering Information
Part Number
Operating
Temperature Range
FXMAR2104UMX
-40 to +85°C
Top
Mark
BY
Package
12-Lead, Ultrathin MLP, 1.8mm x 1.8mm
Packing
Method
5000 Units on
Tape and Reel
© 2011 Fairchild Semiconductor Corporation
FXMAR2104 • Rev. 1.0.1
www.fairchildsemi.com
1 page  
Functional Description
Power-Up/Power-Down Sequencing
FXM translators offer an advantage in that either VCC
may be powered up first. This benefit derives from the
chip design. When either VCC is at 0V, outputs are in a
high-impedance state. The control input (OE) is
designed to track the VCCA supply. A pull-down resistor
tying OE to GND should be used to ensure that bus
contention, excessive currents, or oscillations do not
occur during power-up/power-down. The size of the pull-
down resistor is based upon the current-sinking
capability of the device driving the OE pin.
The recommended power-up sequence is:
1. Apply power to the first VCC.
2. Apply power to the second VCC.
3. Drive the OE input HIGH to enable the device.
The recommended power-down sequence is:
1. Drive OE input LOW to disable the device.
2. Remove power from either VCC.
3. Remove power from other VCC.
Note:
4. Alternatively, the OE pin can be hardwired to VCCA
to save GPIO pins. If OE is hardwired to VCCA,
either VCC can be powered up or down first.
Application Circuit
Figure 3. Application Circuit
© 2011 Fairchild Semiconductor Corporation
FXMAR2104 • Rev. 1.0.1
5
www.fairchildsemi.com
5 Page 
AC Characteristics(17)
Output Load: CL = 50pF, RPU = NC, push-pull driver, and TA = -40°C to +85°C.
VCCB
Symbol
Parameter
4.5 to 5.5V 3.0 to 3.6V 2.3 to 2.7V
1.65 to 1.95V
Unit
Typ. Max. Typ. Max. Typ. Max. Typ. Max.
VCCA = 4.5 to 5.5V
A to B
tPLH B to A
13131313
ns
13243547
A to B
tPHL B to A
24354667
ns
24252657
OE to A
tPZL OE to B
4 5 6 10 5 9 7 15
ns
3 5 4 7 5 8 10 15
OE to A
tPLZ OE to B
65 100 65 105 65 105 65 105
ns
5 9 6 10 7 12 9 16
tskew A Port, B Port(14)
0.5 1.5 0.5 1.0 0.5 1.0 0.5 1.0 ns
VCCA = 3.0 to 3.6V
A to B
tPLH B to A
2.0 5.0 1.5 3.0 1.5 3.0 1.5 3.0
1.5 3.0 1.5 4.0 2.0 6.0 3.0 9.0
ns
A to B
tPHL B to A
2.0 4.0 2.0 4.0 2.0 5.0 6.0 7.0
2.0 4.0 2.0 4.0 2.0 5.0 3.0 5.0
ns
OE to A
tPZL OE to B
4.0 8.0 5.0 9.0 6.0 11.0 7.0 15.0
ns
4.0 8.0 6.0 9.0 8.0 11.0 10.0 14.0
tPLZ
tskew
OE to A
OE to B
A Port, B Port(14)
100 115 100 115 100 115 100 115
5 10 4 8 5 10 9 15
0.5 1.5 0.5 1.0 0.5 1.0 0.5 1.0
ns
ns
VCCA = 2.3 to 2.7V
A to B
tPLH B to A
2.5 5.0 2.5 5.0 2.0 4.0 1.0 3.0
ns
1.5 3.0 2.0 4.0 3.0 6.0 5.0 10.0
A to B
tPHL B to A
25252556
ns
25252536
OE to A
tPZL OE to B
5.0 10.0 5.0 10.0 6.0 12.0 90.0 18.0
4.0 8.0 4.5 9.0 5.0 10.0 9.0 18.0
ns
tPLZ
tskew
OE to A
OE to B
A Port, B Port(14)
100 115 100 115 100 115 100 115
65 110 65 110 65 115 12
25
0.5 1.5 0.5 1.0 0.5 1.0 0.5 1.0
ns
ns
VCCA = 1.65 to 1.95V
A to B
tPLH B to A
4.0 7.0 4.0 7.0 5.0 8.0 5.0 10.0
ns
1.0 2.0 1.0 2.0 1.5 3.0 5.0 10.0
A to B
tPHL B to A
58373789
ns
48373737
OE to A
tPZL OE to B
11 15 11 14 14 28 14 23
ns
6 14 6 14 6 14 9 19
tPLZ
tskew
OE to A
OE to B
A Port, B Port(14)
75 115 75 115 75 115 75 115
75 115 75 115 75 115 75 115
0.5 1.5 0.5 1.0 0.5 1.0 0.5 1.0
ns
ns
Note:
14. Skew is the variation of propagation delay between output signals and applies only to output signals on the same
port (An or Bn) and switching with the same polarity (LOW-to-HIGH or HIGH-to-LOW) (see Figure 14). Skew is
guaranteed, but not tested.
15. AC Characteristic is guaranteed by Design and Characterization
© 2011 Fairchild Semiconductor Corporation
FXMAR2104 • Rev. 1.0.1
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet FXMAR2104.PDF ] | |
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