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PDF FXMA2104 Data sheet ( Hoja de datos )

Número de pieza FXMA2104
Descripción 4-Bit Voltage Translator / Buffer / Repeater / Isolator
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FXMA2104 Hoja de datos, Descripción, Manual

July 2012
FXMA2104
Dual-Supply, 4-Bit Voltage Translator / Buffer /
Repeater / Isolator for Open-Drain Applications
Features
Bi-Directional Interface between Any Two Levels:
1.65V to 5.5V
Direction Control not Needed
System GPIO Resources Not Required when OE
Tied to VCCA
I2C 400pF Buffer / Repeater
I2C-Bus® Isolation
A/B Port VOL = 175mV (Typical), VIL = 150mV,
IOL = 6mA
Open-Drain Inputs / Outputs
Accommodates Standard-Mode and Fast-Mode
I2C-Bus Devices
Supports I2C Clock Stretching & Multi-Master
Fully Configurable: Inputs and Outputs Track VCC
Non-Preferential Power-Up; Either VCC May Be
Powered-Up First
Outputs Switch to 3-State if Either VCC is at GND
Tolerant Output Enable: 5V
Packaged in 12-Lead Ultrathin MLP
(1.8mm x 1.8mm)
ESD Protection Exceeds:
- 5kV HBM ESD (per JESD22-A114)
- 2kV CDM (per JESD22-C101)
Description
The FXMA2104 is a 4-bit high-performance,
configurable dual-voltage supply, open-drain translator
for bi-directional voltage translation over a wide range of
input and output voltages levels.
Intended for use as a voltage translator in applications
using the I2C-Bus® interface, the input and output
voltage levels are compatible with I2C device
specification voltage levels. External pull-up resistors
are required.
The device is designed so that the A port tracks the
VCCA level and the B port tracks the VCCB level. This
allows for bi-directional A/B port voltage translation
between any two levels from 1.65V to 5.5V. VCCA can
equal VCCB from 1.65V to 5.5V.
Non-preferential power-up means either VCC can be
powered-up first. Internal power-down control circuits
place the device in 3-state if either VCC is removed.
The two ports of the device have automatic direction-
sense capability. Either port may sense an input signal
and transfer it as an output signal to the other port.
Ordering Information
Part Number
FXMA2104UMX
Operating
Temperature
Range
-40 to +85°C
Top
Mark
Package
BX 12-Lead, Ultrathin, MLP, 1.8mm x 1.8mm
Packing
Method
5000 Units on
Tape and Reel
© 2011 Fairchild Semiconductor Corporation
FXMA2104 • Rev. 1.0.1
www.fairchildsemi.com

1 page




FXMA2104 pdf
Functional Description
Power-Up/Power-Down Sequencing
FXM translators offer an advantage in that either VCC
may be powered up first. This benefit derives from the
chip design. When either VCC is at 0V, outputs are in a
high-impedance state. The control input (OE) is
designed to track the VCCA supply. A pull-down resistor
tying OE to GND should be used to ensure that bus
contention, excessive currents, or oscillations do not
occur during power-up/power-down. The size of the pull-
down resistor is based upon the current-sinking
capability of the device driving the OE pin.
The recommended power-up sequence is:
1. Apply power to the first VCC.
2. Apply power to the second VCC.
3. Drive the OE input HIGH to enable the device.
The recommended power-down sequence is:
1. Drive OE input LOW to disable the device.
2. Remove power from either VCC.
3. Remove power from other VCC.
Note:
4. Alternatively, the OE pin can be hardwired to VCCA
to save GPIO pins. If OE is hardwired to VCCA,
either VCC can be powered up or down first.
Application Circuit
Figure 3. Application Circuit
© 2011 Fairchild Semiconductor Corporation
FXMA2104 • Rev. 1.0.1
5
www.fairchildsemi.com

5 Page





FXMA2104 arduino
AC Characteristics(17)
Output Load: CL = 50pF, RPU = 2.2kΩ, and TA = -40°C to +85°C.
VCCB
Symbol
Parameter
4.5 to 5.5V 3.0 to 3.6V 2.3 to 2.7V
1.65 to 1.95V Units
Typ. Max. Typ. Max. Typ. Max. Typ. Max.
VCCA = 4.5 to 5.5V
tPLH
A to B
B to A
tPHL
A to B
B to A
tPZL
OE to A
OE to B
tPLZ
OE to A
OE to B
tskew A Port, B Port(14)
VCCA = 3.0 to 3.6V
tPLH
A to B
B to A
tPHL
A to B
B to A
tPZL
OE to A
OE to B
tPLZ
tskew
OE to A
OE to B
A Port, B Port(14)
VCCA = 2.3 to 2.7V
tPLH
A to B
B to A
tPHL
A to B
B to A
tPZL
OE to A
OE to B
tPLZ
tskew
OE to A
OE to B
A Port, B Port(14)
VCCA = 1.65 to 1.95V
tPLH
A to B
B to A
tPHL
A to B
B to A
tPZL
OE to A
OE to B
tPLZ
tskew
OE to A
OE to B
A Port, B Port(14)
13131313
13243547
24354667
24252657
4 5 6 10 5 9 7 15
3 5 4 7 5 8 10 15
65 100 65 105 65 105 65 105
5 9 6 10 7 12 9 16
0.5 1.5 0.5 1.0 0.5 1.0 0.5 1.0
2.0 5.0 1.5 3.0 1.5 3.0 1.5 3.0
1.5 3.0 1.5 4.0 2.0 6.0 3.0 9.0
24242567
24242535
4 8 5 9 6 11 7 15
4 8 6 9 8 11 10 14
100 115 100 115 100 115 100 115
5 10 4 8 5 10 9 15
0.5 1.5 0.5 1.0 0.5 1.0 0.5 1.0
2.5 5.0 2.5 5.0 2.0 4.0 1.0 3.0
1.5 3.0 2.0 4.0 3.0 6.0 5.0 10.0
25252556
25252536
5 10 5 10 6 12 9.0 18.0
4.0 8.0 4.5 9.0 5.0 10.0 9.0 18.0
100 115 100 115 100 115 100 115
65 110 65 110 65 115 12
25
0.5 1.5 0.5 1.0 0.5 1.0 0.5 1.0
4.0 7.0 40. 7.0 5.0 8.0 5.0 10.0
1.0 2.0 1.0 2.0 1.5 3.0 5.0 10.0
58373789
48373737
11 15 11 14 14 28 14 23
6 14 6 14 6 14 9 19
75 115 75 115 75 115 75 115
75 115 75 115 75 115 75 115
0.5 1.5 0.5 1.0 0.5 1.0 0.5 1.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note:
14. Skew is the variation of propagation delay between output signals and applies only to output signals on the same
port (An or Bn) and switching with the same polarity (LOW-to-HIGH or HIGH-to-LOW) (see Figure 14). Skew is
guaranteed, but not tested.
15. AC Characteristic is guaranteed by Design and Characterization.
© 2011 Fairchild Semiconductor Corporation
FXMA2104 • Rev. 1.0.1
11
www.fairchildsemi.com

11 Page







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