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PDF M190E6-L01 Data sheet ( Hoja de datos )
| Número de pieza | M190E6-L01 | |
| Descripción | TFT LCD Module | |
| Fabricantes | Chi Mei | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de M190E6-L01 (archivo pdf) en la parte inferior de esta página. Total 28 Páginas | ||
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Issued Date: May. 9, 2006
Model No.: M190E6-L01
Preliminary
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item
Storage Temperature
Operating Ambient Temperature
Shock (Non-Operating)
Vibration (Non-Operating)
Symbol
TST
TOP
SNOP
VNOP
Value
Min. Max.
-20 60
0 50
- 50
- 1.5
Note (1) Temperature and relative humidity range is shown in the figure below.
Unit
ºC
ºC
G
G
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max.
Relative Humidity (%RH)
100
90
80
Note
(1)
(1), (2)
(3), (5)
(4), (5)
60
Operating Range
40
20
10 Storage Range
-40 -20
0 20 40
Temperature (ºC)
60 80
Note (3) 11ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 300 Hz, 10min/cycle, 3 cycles each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
The fixing condition is shown as below:
At Room Temperature
Side Mount Fixing Screw
Gap=2mm
LCD Module
Bracket
Side Mount Fixing Screw
Stage
5 / 28
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One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
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Global LCD Panel Exchange Center
www.panelook.com
Issued Date: May. 9, 2006
Model No.: M190E6-L01
Preliminary
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
1 RXO0-
2 RXO0+
3 RXO1-
4 RXO1+
5 RXO2-
6 RXO2+
7 GND
8 RXOC-
9 RXOC+
10 RXO3-
11 RXO3+
12 RXE0-
13 RXE0+
14 GND
15 RXE1-
16 RXE1+
17 GND
18 RXE2-
19 RXE2+
20 RXEC-
21 RXEC+
22 RXE3-
23 RXE3+
24 GND
25 TEST
26 NC
27 NC
28 VCC
29 VCC
30 VCC
Negative LVDS differential data input. Channel O0 (odd)
Positive LVDS differential data input. Channel O0 (odd)
Negative LVDS differential data input. Channel O1 (odd)
Positive LVDS differential data input. Channel O1 (odd)
Negative LVDS differential data input. Channel O2 (odd)
Positive LVDS differential data input. Channel O2 (odd)
Ground
Negative LVDS differential clock input. (odd)
Positive LVDS differential clock input. (odd)
Negative LVDS differential data input. Channel O3(odd)
Positive LVDS differential data input. Channel O3 (odd)
Negative LVDS differential data input. Channel E0 (even)
Positive LVDS differential data input. Channel E0 (even)
Ground
Negative LVDS differential data input. Channel E1 (even)
Positive LVDS differential data input. Channel E1 (even)
Ground
Negative LVDS differential data input. Channel E2 (even)
Positive LVDS differential data input. Channel E2 (even)
Negative LVDS differential clock input. (even)
Positive LVDS differential clock input. (even)
Negative LVDS differential data input. Channel E3 (even)
Positive LVDS differential data input. Channel E3 (even)
Ground
Test pin should be tied to ground.
Not connection.
Not connection.
+5.0V power supply
+5.0V power supply
+5.0V power supply
Note (1) Connector Part No.: JAE-FI-XB30SRL-HF11 or equivalent.
Note (2) The first pixel is odd.
Note (3) Input signal of even and odd clock should be the same timing.
11 / 28
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