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PDF LK520D3LZ97 Data sheet ( Hoja de datos )
| Número de pieza | LK520D3LZ97 | |
| Descripción | TFT LCD Module | |
| Fabricantes | Sharp | |
| Logotipo |  |
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26
1 page  
LD- 19Z08-3
45 GND
46 GND
47
VCC
+12V Power Supply
48
VCC
+12V Power Supply
49
VCC
+12V Power Supply
50
VCC
+12V Power Supply
51
VCC
+12V Power Supply
CN2 (Interface signals) (Shown in Fig1)
Using connector
: FI-RE41S-HF (Japan Aviation Electronics Ind., Ltd.)
Mating connector
: FI-RE41HL, FI-RE41CL (Japan Aviation Electronics Ind., Ltd.)
Pin No.
1
2
3
4
5
6
Symbol
Function
Reserved (VCC) (+12V Power Supply)
Reserved (VCC) (+12V Power Supply)
Reserved (VCC) (+12V Power Supply)
Reserved (VCC) (+12V Power Supply)
Reserved
Reserved
Remark
7 Reserved
8 Reserved
9 GND
10 CIN0- Cport (-)LVDS CH0 differential data input
11 CIN0+ Cport (+)LVDS CH0 differential data input
12 CIN1- Cport (-)LVDS CH1 differential data input
13 CIN1+ Cport (+)LVDS CH1 differential data input
14 CIN2- Cport (-)LVDS CH2 differential data input
15 CIN2+ Cport (+)LVDS CH2 differential data input
16 GND
17 CCK- Cport LVDS Clock signal(-)
18 CCK+ Cport LVDS Clock signal(+)
19 GND
20 CIN3- Cport (-)LVDS CH3 differential data input
21 CIN3+ Cport (+)LVDS CH3 differential data input
22 CIN4- Cport (-)LVDS CH4 differential data input
23 CIN4+ Cport (+)LVDS CH4 differential data input
24 GND
25 GND
26 DIN0- Dport (-)LVDS CH0 differential data input
27 DIN0+ Dport (+)LVDS CH0 differential data input
28 DIN1- Dport (-)LVDS CH1 differential data input
29 DIN1+ Dport (+)LVDS CH1 differential data input
30 DIN2- Dport (-)LVDS CH2 differential data input
31 DIN2+ Dport (+)LVDS CH2 differential data input
32 GND
33 DCK- Dport LVDS Clock signal(-)
34 DCK+ Dport LVDS Clock signal(+)
35 GND
36 DIN3- Dport (-)LVDS CH3 differential data input
37 DIN3+ Dport (+)LVDS CH3 differential data input
38 DIN4- Dport (-)LVDS CH4 differential data input
39 DIN4+ Dport (+)LVDS CH4 differential data input
40 GND
41 GND
[Note] GND of a liquid crystal panel drive part has connected with a module chassis.
5 Page 
[Note 2] Brightness Control selection
Pin No.14 is used for the selection of dimming control for VBRT pin (Pin No.13).
Input voltage
0V
3.3V
VBRT
Pulse dimming
Analog dimming
LD- 19Z08-9
[Note 3]Brightness Control
1. Analog Dimming
Brightness control is regulated by analog input voltage (0V to 3.3V).
Input voltage [VBRT]
[Reference]
Brightness ratio［%］
MIN
0V
20
TYP
<->
<->
MAX
3.3V
100
Ta=25℃
Function
0V: Dark - 3.3V: Bright
[Note] PWM frequency : 275±10Hz
[Note]There is a case that lamp mura may happen, depending on ambient temperature and dimming.
Dimming level should be set according to your evaluation of actual display performance.
(Minimum input voltage 1.5V at below 15℃)
2.Pulse Dimming
Pin No.13 is used for the control of the PWM duty with input pulse from 150Hz to 350Hz.
Input PWM waveform
High voltage
Low voltage
Ton
ON OFF
T
ON
Duty＝TON/T
Pulse signal
DUTY(TON/T)
Dimming level
(Brightness ratio)
[Hz]
[%]
[%]
MIN
150
35
20
TYP
275
<->
<->
MAX
350
100
100
Remark
Ta=25℃
Ta=25℃
Pulse signal=275Hz
[Note]There is a case that lamp mura may happen, depending on ambient temperature,
in dimming. Minimum dimming level should be set according to your evaluation of
actual display performance. (Minimum duty 60％ at below 15℃)
[Note]In case of using Pulse Dimming, be careful so that the VBRT signal (Pin 13) doesn’t have glitch.
11 Page | ||
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| PDF Descargar | [ Datasheet LK520D3LZ97.PDF ] | |
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