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PDF V320BK1-PD1 Data sheet ( Hoja de datos )
| Número de pieza | V320BK1-PD1 | |
| Descripción | TFT LCD Module | |
| Fabricantes | CMI MEI | |
| Logotipo |  |
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PRODUCT SPECIFICATION
□ Tentative Specification
□ Preliminary Specification
■ Approval Specification
MODEL NO.: V320BK1
SUFFIX: PD1
Customer:
APPROVED BY
Name / Title
Note
SIGNATURE
Please return 1 copy for your confirmation with your signature and
comments.
Approved By
Checked By Prepared By
Chao-Chun Chung Vincent Chou Kevin Tsai
Version 2.0
1 DateΚ2 Mar. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
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PRODUCT SPECIFICATION
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item
Storage Temperature
Operating Ambient Temperature
Symbol
TST
TOP
Value
Min. Max.
-20 +60
0 50
Note (1) Temperature and relative humidity range is shown in the figure below.
Unit Note
ºC (1)
ºC (1), (2)
(a) 90 %RH Max. (Ta Љ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature
of display area from being over 65 ºC. The range of operating temperature may degrade in case of
improper thermal management in final product design.
Relative Humidity (%RH)
100
90
80
60
Operating Range
40
20
10 Storage Range
-40 -20
0 20 40
Temperature (ºC)
60 80
Version 2.0
5 DateΚ2 Mar. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
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PRODUCT SPECIFICATION
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE INPUT
CNF1 Connector Pin Assignment: (WF23-400-513C (FCN) or equivalent)
Pin Name
Description
1 N.C.
No Connection
2 SCL
˜˅˖ Serial Clock
3 SDA
˜˅˖ Serial Clock
4 N.C.
No Connection
5 L/R_O
Output signal for Left Right Glasses control
6 N.C.
No Connection
7 SELLVDS
Input signal for LVDS Data Format Selection
8 N.C.
No Connection
9 PWM0
Upper side scanning B/L signal in 3D mode (no reverse panel)
10 PWM2
Lower side scanning B/L signal in 3D mode (no reverse panel)
11 GND
Ground
12 ORX0-
Odd pixel Negative LVDS differential data input. Channel 0
13 ORX0+
Odd pixel Positive LVDS differential data input. Channel 0
14 ORX1-
Odd pixel Negative LVDS differential data input. Channel 1
15 ORX1+
Odd pixel Positive LVDS differential data input. Channel 1
16 ORX2-
Odd pixel Negative LVDS differential data input. Channel 2
17 ORX2+
Odd pixel Positive LVDS differential data input. Channel 2
18 GND
Ground
19 OCLK-
Odd pixel Negative LVDS differential clock input
20 OCLK+
Odd pixel Positive LVDS differential clock input
21 GND
Ground
22 ORX3-
Odd pixel Negative LVDS differential data input. Channel 3
23 ORX3+
Odd pixel Positive LVDS differential data input. Channel 3
24 N.C.
No Connection
25 N.C.
No Connection
26 2D/3D
Input signal for 2D/3D Mode Selection
27 L/R
Input signal for Left Right eye frame synchronous
28 ERX0-
Even pixel Negative LVDS differential data input. Channel 0
Note
(1)
(˄˃)
(1)
(8)
(1)
(2)(5)
(1)
(9)
(7)
(7)
(7)
(1)
(3)(6)
(4)(6)
(7)
Version 2.0
11 DateΚ2 Mar. 2012
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet V320BK1-PD1.PDF ] | |
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