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PDF L6917 Data sheet ( Hoja de datos )
| Número de pieza | L6917 | |
| Descripción | 5 BIT PROGRAMMABLE DUAL-PHASE CONTROLLER | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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L6917
5 BIT PROGRAMMABLE DUAL-PHASE CONTROLLER
s 2 PHASE OPERATION WITH
SYNCRHONOUS RECTIFIER CONTROL
s ULTRA FAST LOAD TRANSIENT RESPONSE
s INTEGRATED HIGH CURRENT GATE
DRIVERS: UP TO 2A GATE CURRENT
s TTL-COMPATIBLE 5 BIT PROGRAMMABLE
OUTPUT COMPLIANT WITH VRM 9.0
s 0.8% INTERNAL REFERENCE ACCURACY
s 10% ACTIVE CURRENT SHARING
ACCURACY
s DIGITAL 2048 STEP SOFT-START
s OVERVOLTAGE PROTECTION
s OVERCURRENT PROTECTION REALIZED
USING THE LOWER MOSFET’S RdsON OR A
SENSE RESISTOR
s 300 kHz INTERNAL OSCILLATOR
s OSCILLATOR EXTERNALLY ADJUSTABLE
UP TO 1MHz
s POWER GOOD OUTPUT AND INHIBIT
FUNCTION
s REMOTE SENSE BUFFER
s PACKAGE: SO-28
APPLICATIONS
s POWER SUPPLY FOR SERVER AND
WORKSTATION
s POWER SUPPLY FOR HIGH CURRENT
MICROPROCESSORS
s DISTRIBUTED POWER SUPPLY
SO-28
ORDERING NUMBERS: L6917D
L6917DTR (Tape & Reel)
DESCRIPTION
The device is a power supply controller specifically
designed to provide a high performance DC/DC con-
version for high current microprocessors.
The device implements a dual-phase step-down con-
troller with a 180° phase-shift between each phase.
A precise 5-bit digital to analog converter (DAC) al-
lows adjusting the output voltage from 1.100V to
1.850V with 25mV binary steps.
The high precision internal reference assures the se-
lected output voltage to be within ±0.8%. The high
peak current gate drive affords to have fast switching
to the external power mos providing low switching
losses.
The device assures a fast protection against load
over current and load over/under voltage. An internal
crowbar is provided turning on the low side mosfet if
an over-voltage is detected. In case of over-current
or under voltage, the system works in HICCUP mode.
BLOCK DIAGRAM
ROSC / IN H
SG ND
VCCDR
PGO OD
2 PH ASE
OSCILLATOR
DIGI TAL
SO FT STA RT
VID4
VID3
VID2
VID1
VID0
DAC
FBG
F BR
1 0k
1 0k
10k
1 0k
REMOT E
BUF FER
LO GIC
AND
P ROTECTIO NS
VCC
VCC DR
CH1 OVER
CU RR ENT
CH 2 OVER
CURR ENT
IFB
E RROR
A MPLIFIER
PWM1
-
+
CH 1 OVER
CU RR ENT
+TOTAL
CURR ENT
A VG
CU RRENT
<>
CURRENT
READ ING
CURRENT
READ ING
CH 2 OVER
CU RR ENT
+
-
PWM2
Vcc
HS
LS
LS
HS
BOOT 1
UGATE1
PH ASE1
LG ATE1
ISEN1
PGNDS 1
PGND
PGNDS 2
ISEN2
LG ATE2
PH ASE2
UGATE2
BOOT 2
October 2001
VSEN
FB
COMP
Vc c
1/27
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1 page  
Table 1. VID Settings
VID4
VID3
11
11
11
11
11
11
11
11
10
10
10
10
10
10
10
10
01
01
01
01
01
01
01
01
00
00
00
00
00
00
00
00
VID2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
VID1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
VID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
L6917
Outpu t Voltage (V)
OUTPUT OFF
1.100
1.125
1.150
1.175
1.200
1.225
1.250
1.275
1.300
1.325
1.350
1.375
1.400
1.425
1.450
1.475
1.500
1.525
1.550
1.575
1.600
1.625
1.650
1.675
1.700
1.725
1.750
1.775
1.800
1.825
1.850
5/27
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5 Page 
L6917
Current Reading and Over Current
The current flowing trough each phase is read using the voltage drop across the low side mosfets rDSON or
across a sense resistor (RSENSE) and internally converted into a current. The transconductance ratio is issued
by the external resistor Rg placed outside the chip between ISENx and PGNDSx pins toward the reading points.
The full differential current reading rejects noise and allows to place sensing element in different locations with-
out affecting the measurement’s accuracy. The current reading circuitry reads the current during the time in
which the low-side mosfet is on (OFF Time). During this time, the reaction keeps the pin ISENx and PGNDSx
at the same voltage while during the time in which the reading circuitry is off, an internal clamp keeps these two
pins at the same voltage sinking from the ISENx pin the necessary current.
The proprietary current reading circuit allows a very precise and high bandwidth reading for both positive and
negative current. This circuit reproduces the current flowing through the sensing element using a high speed
Track & Hold transconductance amplifier. In particular, it reads the current during the second half of the OFF
time reducing noise injection into the device due to the mosfet turn-on (See fig. 4).
Figure 4.
ILS1
ILS2
Total current
information
Track & Hold
LGAT EX
ISENX
PGNDSX
Rg
IISENx
Rg
50µA
This circuit sources a constant 50µA current from the PGNDSx pin and keeps the pins ISENx and PGNDSx at
the same voltage. Referring to figure 4, the current that flows in the ISENx pin is then given by the following
equation:
IISENx
=
50µA
+
-R----S----E---N----S----E-----⋅---I--P----H----A---S----E-
Rg
=
50µ A + IINFOx
Where RSENSE is an external sense resistor or the rdson, on of the low side mosfet and Rg is the transconduc-
tance resistor used between ISENx and PGNDSx pins toward the reading points; IPHASE is the current carried
by each phase and, in particular, the current measured in the middle of the oscillator period
The current information reproduced internally is represented by the second term of the previous equation as
follow:
IINFO x
=
R-----S----E---N----S----E-----⋅---I--P---H-----A---S----E-
Rg
Since the current is read in differential mode, also negative current information is kept; this allow the device to
check for dangerous returning current between the two phases assuring the complete equalization between the
phase’s currents.
From the current information of each phase, information about the total current delivered (IFB = IINFO1 + IINFO2)
and the average current for each phase (IAVG = (IINFO1 + IINFO2)/2 ) is taken. IINFOX is then compared to IAVG
to give the correction to the PWM output in order to equalize the current carried by the two phases.
11/27
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11 Page | ||
| Páginas | Total 27 Páginas | |
| PDF Descargar | [ Datasheet L6917.PDF ] | |
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