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PDF L6598D Data sheet ( Hoja de datos )

Número de pieza L6598D
Descripción HIGH VOLTAGE RESONANT CONTROLLER
Fabricantes STMicroelectronics 
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No Preview Available ! L6598D Hoja de datos, Descripción, Manual

L6598
HIGH VOLTAGE RESONANT CONTROLLER
s HIGH VOLTAGE RAIL UP TO 600V
s dV/dt IMMUNITY ±50V/ns IN FULL
TEMPERATURE RANGE
s DRIVER CURRENT CAPABILITY:
250mA SOURCE
450mA SINK
s SWITCHING TIMES 80/40ns RISE/FALL WITH
1nF LOAD
s CMOS SHUT DOWN INPUT
s UNDER VOLTAGE LOCK OUT
s SOFT START FREQUENCY SHIFTING
TIMING
s SENSE OP AMP FOR CLOSED LOOP
CONTROL OR PROTECTION FEATURES
s HIGH ACCURACY CURRENT CONTROLLED
OSCILLATOR
s INTEGRATED BOOTSTRAP DIODE
s CLAMPING ON Vs
s SO16, DIP16 PACKAGES
DESCRIPTION
The L6598 is manufactured with the BCD OFF LINE
BLOCK DIAGRAM
DIP16
SO16N
ORDERING NUMBERS:
L6598
L6598D
technology, able to ensure voltage ratings up to
600V, making it perfectly suited for AC/DC Adapters
and wherever a Resonant Topology can be benefi-
cial. The device is intended to drive two Power MOS,
in the classical Half Bridge Topology. A dedicated
Timing Section allows the designer to set Soft Start
Time, Soft Start and Minimum Frequency. An Error
Amplifier, together with the two Enable inputs, are
made available. In addition, the integrated Bootstrap
Diode and the Zener Clamping on low voltage sup-
ply, reduces to a minimum the external parts needed
in the applications.
OPOUT
OPIN-
OPIN+
5
6
7
OP AMP
+
-
Rfmin
Rfstart
Ifmin
4
Ifstart
2
VREF
VREF
3
VCO
Cf
VS
12
UV
DETECTION
DEAD
TIME
CONTROL
LOGIC
Iss
BOOTSTRAP
DRIVER
DRIVING
LOGIC
H.V.
16 VBOOT
HVG
DRIVER
LEVEL
SHIFTER
LVG DRIVER
Vthe1
+
-
Vthe2
+
-
15 HVG
14
OUT
Vs
11 LVG
10
GND
8
EN1
9
EN2
CBOOT
LOAD
1
Css
D98IN887A
February 2000
1/16

1 page




L6598D pdf
ELECTRICAL CHARACTERISTCS (continued)
Symbol Pin
Parameter
Test Condition
SENSE OP AMP
lIB 6, 7 Input Bias Current
Vio Input Offset Voltage
Rout 5 Output Resistance
Iout-
Source Output Current
Vout = 4.5V
Iout+ Sink Output Current
Vout = 0.2V
Vic 6,7 OP AMP input common mode
range
GBW
Sense Op Amp Gain Band
Width Product
Gdc DC Open Loop Gain
COMPARATORS
Vthe1
Vthe2
8 Enabling Comparator Threshold
9 Enabling Comparator Threshold
tpulse
8,9 Minimum Pulse lenght
Figure 1. EN2 Timing Diagrams
L6598
Min. Typ. Max. Unit
0.1 µA
-10 10 mV
200 300
1 mA
1 mA
-0.2 3 V
1 MHz
80 dB
0.56 0.6 0.64
1.05 1.2 1.35
200
V
V
ns
VS
fOUT
fstart
fmin
EN2
VCss
TSS
TSS
D98IN889
5/16

5 Page





L6598D arduino
L6598
OP AMP Section
The integrated OP AMP is designed to offer Low Output Impedance, wide band, High input Impedance and wide
Common Mode Range. It can be readily used to implement protection features or a closed loop control. For this
purpose the OP AMP Output can be properly connected to Rfmin pin to adjust the oscillation frequency.
Comparators
Two CMOS comparators are available to perform protection schemes. Short pulses (>= 200ns) on Comparators
Input are recognised. The EN1 input (active High), has a threshold of 0.6V (typical value) forces the L6598 in a
latched shut down state (e.g. LVG Low, HVG low, Oscillator stopped), as in the Under Voltage Conditions. Nor-
mal Operating conditions are resumed after a power-off power-on sequence. The EN2 input (active high), with
a threshold of 1.2V (typical value) restarts a Soft Start sequence (see Timing Diagrams). In addition the EN2
Comparator, when activated, removes a latched shutdown caused by EN1.
Figure 12. Switching Time Waveform Definitions
90%
90%
HVG
10%
tr
10%
tf
90%
90%
LVG
10%
tr
10%
tf
Figure 13. Dead Time and Duty Cycle Waveform Definition
T1
td
td
D98IN898
Dc = T1
Tperiod
HVG
50%
50%
LVG
50%
50%
Tperiod
50%
D98IN899
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