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PDF GS810C Data sheet ( Hoja de datos )

Número de pieza GS810C
Descripción Microprocessor Reset Monitors
Fabricantes Vishay Siliconix 
Logotipo Vishay Siliconix Logotipo



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No Preview Available ! GS810C Hoja de datos, Descripción, Manual

GS809C and GS810C
New Product
Vishay
formerly General Semiconductor
Microprocessor Reset Monitors
Pin Configuration
SOT-23 (Top View)
GND 1
Reset
Output
2
3 Vcc
Fig. 1 – Typical Application Diagram
VCC
VCC
GS809C
Reset
VCC
Processor
Reset
Input
GND
GND
Description
• The GS809C and 810C are system supervisor
circuits designed to monitor VCC in digital systems
and provide a reset signal to the host processor
when necessary. No external components are
required.
• When the processor power supply voltage drops
below the reset threshold, the reset output is driven
active, in less than 40µs (TD1). Reset is main-
tained active for a time period (TD2), after the Vcc
rises above the threshold voltage.
• To prevent jitter, the reset threshold voltage has a
built-in hysteresis of 0.4% of VTH.
• The GS809C has an active-low reset output, while
the GS810C has an active-high reset output. Both
devices have push/pull output drives.
• The reset signal is guaranteed valid, down to
Vcc = 1.0V.
• Low supply current of 3µA makes these devices
well suited for battery powered applications. They
are designed to reject fast transients from causing
false resets.
• Both devices are available in a space-saving
SOT-23 package.
Applications
• Computers
• Battery Powered Equipment
• Critical uProcessor and uController power supply
monitoring
Features
• Tight reset voltage tolerances ± 1.5%
• 4 reset active timeout period options
• Low quiescent current: < 3µA
• 9 reset threshold options from 2.1V to 4.63V
• Reset output guaranteed down to 1.0V
• No external components
• Vcc Transient immunity
• Wide temperature range –40°C to +85°C
Document Number 74808
01-Nov-02
www.vishay.com
1

1 page




GS810C pdf
Ratings and
Characteristic Curves (TA = 25°C unless otherwise noted)
GS809C and GS810C
Vishay
formerly General Semiconductor
Fig. 4 Reset Time vs. Temperature
220
215
210 GS809CREU
205
200
195
190
--50
--20
10 40 70
Temperature (°C)
100 130
Fig. 6 Reset Vth vs. Temperature
2.650
2.648
2.646
2.644
2.642
2.640
GS809CREU
2.638
2.636
2.634
2.632
2.630
--50
--20
10 40 70
Temperature (°C)
100 130
Fig. 8 TD1 Delay vs. Temperature
43
42
41
40
39
38
37
--40 --20
0 20 40 60
Temperature (°C)
Document Number 74808
01-Nov-02
80 100
Fig. 5 ICC vs. Temperature
2.35
2.30
2.25
GS809CREU
2.20
2.15
2.10
--50 --20
10 40 70
Temperature (°C)
100 130
Fig. 7 ICC vs. VCC
2
1.6
85°C
1.2
0.8
0.4
40°C
0°C
0
01 2345
VCC (V)
www.vishay.com
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