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PDF L6260 Data sheet ( Hoja de datos )

Número de pieza L6260
Descripción 4.5 - 5.5V DISK DRIVER SPINDLE & VCM/ POWER & CONTROL COMBOS
Fabricantes STMicroelectronics 
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L6260
4.5 – 5.5V DISK DRIVER SPINDLE & VCM,
POWER & CONTROL COMBO’S
GENERAL
5V OPERATION. *REGISTER BASED ARCHI-
TECTURE
MINIMUM EXTERNAL COMPONENTS
SLEEP AND IDLE MODES FOR LOW
POWER CONSUMPTION
SELECTABLE GAINS FOR BOTH V.C.M.
AND SPINDLE
10 BIT (+ SIGN + GAIN ) VCM & 8 BIT SPIN-
DLE DACs
HIGH BANDWIDTH SPEED REGULATION
LOOP (ONCE PER MECH\ELEC CYCLE AC-
CURACY)
VCM DRIVER
CURRENT SENSE CONTROL (VOLTAGE
PROPORTIONAL TO CURRENT)
300mA DRIVE CAPABILITY
TWO CURRENT RANGES FOR SEEKING
AND TRACKING
INTERNAL REGISTER FOR POWER AMP
CONTROL LINES
SPINDLE DRIVER
BEMF PROCESSING FOR SENSORLESS
MOTOR COMMUTATION
PROGRAMMABLE COMMUTATION PHASE
DELAY
PROGRAMMABLE SLEW-RATE FOR RE-
DUCED E.M.I.
0.8FOR ANY HALF BRIDGE WORST CASE
SYNCHRONOUS RECTIFICATION OF THE
B.E.M.F. DURING RETRACT OPERATION
BIPOLAR \ TRIPOLAR OPERATION
SYNTHESIZED HALL OUTPUTS
1.0 AMP DRIVE CAPABILITY
OTHER FUNCTIONS
POWER UP SEQUENCING
POWER DOWN SEQUENCING
LOW VOLTAGE SENSE
ACTUATOR RETRACTION
DYNAMIC BRAKE
THERMAL SHUTDOWN
November 1996
BICMOS TECHNOLOGY
TQFP64
ORDERING NUMBER: L6260
THERMAL & CURRENT PROTECTION
DESCRIPTION
The L6260 is single chip sensorless (DC) spindle
motor and voice coil controllers including power
stages suitable for use in small disk drives.
These devices have a serial interface for a micro-
processor running up to 10 Mega bits per second.
There are registers on chip to allow the setting of
the desired spindle speed via the on chip Fre-
quency Locked Loop (F.L.L.). No external compo-
nents are required in the sensor-less operation as
the control functions are integrated on chip (e.g.
B.E.M.F. processing, digital masking, digital delay
and sequencing).
The V.C.M. drivers uses a transconductance am-
plifier, able to provide 2 different current ranges,
suitable for seeking and tracking.
When a low voltage is detected, a Power On Re-
set (P.O.R.) is issued and the internal registers
are reset, the spindle power circuitry is tri-stated,
B.E.M.F. synchronous rectification is enabled, the
actuator retracts and then dynamic braking of the
spindle is applied.
These devices are built in BICMOS technology al-
lowing dense digital circuitry to be combined with
MOS\Bipolar power devices.
1/30

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L6260 pdf
L6260
PIN DESCRIPTION (continued)
Pin Types: I = Input, O = Output, P = Power, A = Analog (passive)
Power down sequencing, POR, other voltage pins
PIN #
13
28
30
61
62
64
2
52
5
50
51
4
3
PIN NAME
DESCRIPTION
VRECT
BRK_DLY
VPDOWN
C1HIGH
C1LOW
C2HIGH
C2LOW
POR_DLY
POR
UV1
SPN_DSBL_
DLY
VHTRIP
VLTRIP
Output of the synchronous rectifier supplying power to
the retract circuitry. Filtered by an internal 400pF
capacitor. Normally not externally connected. However,
if retract command is to be used, a small signal silicon
diode must be connected between this pin and Vcc
(Cathode to VRECT) to supply the additional current
which may be required to brake the VCM.
An external parallel RC network from this point to
ground sets the Brake dELAY:T = 0.45 RC.
Typical values are R = 4M, C=0.1µF (0.16sec,
delay).
Voltage tripler reservoir capacitor. This is used for
the brake operation when power is removed from
the chip. No DC load allowed. 1µF minimum, 10µF
prefered.
Positive terminal of charge pump capacitor.
10nF (typ) for Tripler operation;
330nF (typ0 or Doubler operation
Negative terminal of charge pump capacitor.
10nF (typ) for Tripler operation;
330nF (typ) or Doubler operation
Positive terminal of charge pump capacitor for
Tripler operation. 330nF (typ).
Connected tp VHRTRIP for Doubler operation.
Negative terminal of charge pump capacitor for
Tripler operation. 330nF (typ).
Not connected for Doubler operation.
An external capacitor from this pin to ground sets
the duration of POR after power has been re-
established. T (por) = 32 X C (por)
where: C (por) is in pF and T is expresssed in µs.
Power On Reset. This open drain output goes low
when the voltage at either UV1 or UV2 goes below
1.25V.
Under voltage detector 1. This defines the
VOLTAGE GOOD threshold by comparing the
voltage on this pin to the internal 1.25V reference.
An external resistor divider network and capacitor
filter provides the selection of threshold and supply
noise rejection. There is an internal pull-up (2µA
max). Hysteresis is 20mV.
Spindle Disable Delay . A capacitor connected
between this pin and Vcc programs the delay
between POR and the disabling of the Spindle
section..
Delay = 80 xC (C in pF; Delay in µs)
High tripler/Doubler output. 330nF (typ). 11V max.
Low tripler/Doubler output. 330nF (typ). for stability.
PIN I\O
TRI-STATE
TYPE MAPPED? @SLEEP/@POR
AO No
No
A No
A No
A No
A No
A No
A No
A No
DO Yes
AI Yes
No
No
No
No
No
No
No
No
No
AI Yes
AO No
AO No
No
No
No
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5 Page





L6260 arduino
L6260
System Control Register A (Reg 3)
Reg: 3
Name: System Control Register A
Type: Write only.
BIT LABEL
0 SPIN_ENABLE
1 VCM_ENABLE
2 SRESET
3 INCRE
4 RUN_SRCH
5 8_12P
6 BIP_TRIP
7 UNI_TRIP
8 VCMRET
9 SPEED
10 EL_MECH
11 TEST_COUNT_RESET
DESCRIPTION
@POR
Enable spindle functions (1 = enabled; 0 = Disabled). Together
with VCM_ENABLE, determine the Normal, Idle or Sleep mode of
operation. See Mode Table for details.
0
Enable VCM functions (1 = enabled; 0 = Disabled). Together with
SPIN_ENABLE, determine the Normal, Idle or Sleep mode of
operation. See Mode Table for details.
0
Reset spindle state machine (sequencer). 0=Reset. All spindle
and FLL registers are also reset. Also used to control the charge
pump (1 = off).
0
A 0 to 1 transition of this bit increments the spindle state machine.
Normally used in SEARCH mode. Must be set to 1 in RUN Mode.
0
1=Auto-increment enabled (RUN Mode)
0 = Auto-increment disabled (SEARCH MODE)
0
Selects 8/12 pole motor: 1 = 8 pole, 0 = 12 pole
0
Define Tristate, Bipolar, or Tripolar operation:
0
See Spindle Drive Mode Table.
0
Activated VCM Retract: 1 = retract.
0
Programs the Spindle Speed Control Method.
SPEED= 0: The L6260 operates open loop, with speed error
sensing performed externally and speed effort written into the
SPIN_DAC.
SPEED = 1: The speed is controlled internally through the built-in
control loop.
0
Specifies electrical or mechanical cycle for the FLL control.
1 = Electrical, 0 = Mechanical
0
Writing a 0 resets the test sequence. Must be set to 1 to allow
ATEST and DTEST functions.
0
MODE OF OPERATION (REGISTER 3 BITS 0 AND 1)
SPIN_ENABLE
(0) DISABLED
(0) DISABLED
(1) ENABLED
(1) ENABLED
VCM_ENABLE
(0) DISABLED
(1) ENABLED
(0) DISABLED
(1) ENABLED
MODE
SLEEP
NOT NORMAL
IDLE
NORMAL
DESCRIPTION
MINIMUM POWER DISSIPATION.
VCM IS FORCED TO A PARK CONDITION
VCM DISABLED FOR REDUCED DISSIPATION
NORMAL MODE OF OPERATION
SPINDLE DRIVE MODE (REGISTER 3 BITS 6 AND 7)
BIP_TRIP
0
0
1
1
UNI_TRIP
0
1
0
1
SPINDLE DRIVE MODE
TRISTATE
NOT DEFINED
BIPOLAR
TRIPOLAR
11/30

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