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PDF RDA5876 Data sheet ( Hoja de datos )

Número de pieza RDA5876
Descripción SINGLE CHIP FOR BLUETOOTH & FM RADIO TUNER
Fabricantes RDA 
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RDA5876
SINGLE CHIP FOR BLUETOOTH & FM RADIO TUNER
Rev.1.2–07.2011
1 General Description
RDA5876 integrates industry-lead Bluetooth and
FM radio tuner into one chip and is optimized for
mobile applications. Bluetooth and FM can work
simultaneously and independently, with low power
consumption levels target to battery powered
devices. For the highest integration level, the
required board space has been minimized and
customer cost has been reduced. Manufacturers
can easily and fast integrate RDA5876 on their
product to enable a rapid time to market.
RDA5876 uses CMOS process with a compact
4*4mm 32-pin QFN package.
32 31 30 29 28 27 26 25
UART_RX 1
PCM_DOUT 2
PCM_DIN 3
PCM_CLK 4
PCM_SYNC 5
VIO 6
VOUT18 7
DCDC_SW 8
GND PAD
RDA5876
32 Pins
24 NC
23 FM_IP
22 FM_IN
21 AGPIO1/BT_PRIORITY
20 AGPIO0/BT_ACTIVE
19 RF
18 NC
17 NC
9 10 11 12 13 14 15 16
Figure1-1. RDA5876 Top View
1.1 Bluetooth Features
z CMOS single-chip fully-integrated radio and
baseband
z Compliant with Bluetooth 2.1 + EDR specification
z Bluetooth Piconet and Scatternet support
z ARM7-based microprocessor with on-chip ROM
and RAM
z Meet class 2 and class 3 transmitting power
requirement, support class1 operation with external
power amplifier
z Provides +10dbm transmitting power
z NZIF receiver with -90dBm sensitivity
z Battery power supply directly with internal LDO
z Support DCXO with internal oscillator circuit
z Up-to 4Mbps high speed UART HCI support
z Support AFH
z Support 3-wire WIFI Co-existence handshake
signals
z Low power consumption
z Minimum external component
z Internal 32k LPO.
Copyright © RDA Microelectronics Inc. 2009. All rights are reserved.
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.

1 page




RDA5876 pdf
RDA Microelectronics, Inc.
RDA5876 Datasheet V1.2
4 Bluetooth Section Features
„ Radio
Build-in TX/RX switch
Fully integrated synthesizer without any external component
Support DCXO or external reference clock direct input
Class2 and class3 transmit output power supported and over 30dB dynamic control range
Supports π/4 DQPSK and 8DPSK modulation
High performance in receiver sensitivity and over 80dB dynamic range
Integrated channel filter
„ Auxiliary features
On-chip regulator to support battery power supply directly
Power management support low power mode
Support share handset system reference clock
Support 3-wire wifi cooperation handshake protocol
Support external class1 PA and antenna switch
„ Baseband
Internal RAM allows fully speed data transfer, mixed voice and data, and fully piconet operation
Logic for forward error correction, header error control, access code correlation, CRC,
demodulation , encryption bit stream generation, whitening and transmit pulse shaping
Support eSCO and AFH
Support up to Bluetooth v2.1 + EDR
Support A-law, μ-law and CVSD digitize audio CODEC in PCM interface
„ Interface
Provides UART HCI interface, up-to 4Mbps
Provides I2C interface for host to do configuration
Provides PCM audio interface
Provides 3-wire and 2-wire WIFI Co-existence handshake interface
„ Bluetooth Stack
Compliant with Bluetooth 2.1 + EDR specification
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
Page 5 of 22

5 Page





RDA5876 arduino
RDA Microelectronics, Inc.
RDA5876 Datasheet V1.2
7 FM Section Functional Description
LNAP
LNAN
LNA
+
-
Limiter
I
PGA
Q
PGA
I
ADC
Q
ADC
Audio
DSP
Core
digital filter
MPX decoder
stereo/mono
audio
L
DAC
LOUT
R
DAC
ROUT
32.768 KHz
RCLK
Synthesizer
2.7-5.5 V
VDD
LDO
VCO
RDS
/RBDS
RSSI
GPIO
GPIO
Interface
Bus
SCLK
MCU
SDIO
VIO
Figure 7-1. RDA5876 FM Tuner Block Diagram
FM Receiver
The PGA amplifies the mixer output IF signal and
then digitized with ADCs.
The receiver uses a digital low-IF architecture that
avoids the difficulties associated with direct
conversion while delivering lower solution cost
and reduces complexity, and integrates a low
noise amplifier (LNA) supporting the FM
broadcast band (50 to 115MHz), a quadrature
image-reject mixer, a programmable gain control
(PGA), a high resolution analog-to-digital
converters (ADCs), an audio DSP and a high-
fidelity digital-to-analog converters (DACs).
The DSP core finishes the channel selection, FM
demodulation, stereo MPX decoder and output
audio signal. The MPX decoder can autonomous
switch from stereo to mono to limit the output
noise.
The DACs convert digital audio signal to analog
and change the volume at same time. The DACs
has low-pass feature and -3dB frequency is about
30 KHz.
The LNA has differential input ports (LNAP and
LNAN) and supports any input port by set
according registers bits (LNA_port_sel[1:0]). It
default input common mode voltage is GND.
The limiter prevents overloading and limits the
amount of intermodulation products created by
strong adjacent channels.
The quadrature mixer down converts the LNA
output differential RF signal to low-IF, it also has
image-reject function.
Synthesizer
The frequency synthesizer generates the local
oscillator signal which divide to quadrature, then
be used to downconvert the RF input to a
constant low intermediate frequency (IF). The
synthesizer reference clock is 32.768 KHz.
The synthesizer frequency is defined by bits
CHAN[9:0] with the range from 50MHz to
115MHz.
The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in
part without prior written permission of RDA.
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