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PDF ACPM-7881 Data sheet ( Hoja de datos )
| Número de pieza | ACPM-7881 | |
| Descripción | W-CDMA Power Amplifier | |
| Fabricantes | Agilent | |
| Logotipo |  |
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Agilent ACPM-7881
W-CDMA Power Amplifier
Data Sheet
Description
The ACPM-7881 is a high
performance W-CDMA power
amplifier module offered in a
4x4x1.1mm package. Designed
around Agilent Technologies’
GaAs Enhancement Mode
pHEMT process, the ACPM-
7881 offers premium power
added efficiency and linearity
in a very small form factor.
The PA is fully matched to 50
Ohms on the input and output.
Functional Block Diagram
Vdd1
(1)
Vdd3
(10)
The amplifier has excellent
ACLR and efficiency
performance at max Pout,
28.5dBm, and low quiescent
current (50mA) with a single
bias control voltage, Vctrl =
2.0V. No regulated voltages
are required to set the bias,
Vdd2 can be connected directly
to the battery.
Designed in a surface mount
RF package, the ACPM-7881 is
very cost and size competitive.
Features
• Operating frequency: 1920 - 1980
MHz
• 28.5 dBm Linear Output Power @
3.5V
• High Efficiency 46% PAE
• Single bias, low quiescent current
(50mA)
• Internal 50 ohm matching
networks for both RF input &
output
• No regulated voltages required
• 3.2 - 4.5 V linear operation
• 4.0 x 4.0mm SMT Package
• Low package profile, 1.1mm
Applications
• W-CDMA Handsets
• Data Cards
• PDAs
RF in
(2)
Bias Control
MMIC
Output
Match
Module
Vctrl
Vdd2
Gnd
(4) (5) (3,6,7,9)
RF out
(8)
1 page  
Performance Graphs
Unless Otherwise Specified: f=1920-1980MHz, Vdd1=Vdd3=3.5V, Vdd2=2.85V, Vctrl=2.0V,
Pout=28.5dBm, Ta=25°C, Zin/Zout = 50Ω
Data measured at 1920MHz
60
50
40
30
20
10
0
-10 -5 0 5 10 15 20 25 30
Pout (dBm)
Figure 1. PAE vs Pout
600
500
400
300
200
100
0
-10 -5 0 5 10 15 20 25 30
Pout (dBm)
Figure 2. Total Idd vs Pout
-20
-25
-30
-35
-40
-45
-50
-55
-60
-10 -5 0 5 10 15 20 25 30
Pout (dBm)
Figure 3. ACLR1 vs Pout
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-10 -5 0
5 10 15 20 25 30
Pout (dBm)
Figure 4. ACLR2 vs Pout
30
29
28
27
26
25
24
23
22
21
20
-25 -20 -15 -10 -5 0 5 10 15 20 25 30
Pout (dBm)
Figure 5. Gain vs Pout
Data measured at 1950MHz
60
50
40
30
20
10
0
-10 -5 0 5 10 15 20 25 30
Pout (dBm)
Figure 6. PAE vs Pout
600
500
400
300
200
100
0
-10 -5 0
5 10 15 20 25 30
Pout (dBm)
Figure 7. Total Idd vs Pout
-20
-25
-30
-35
-40
-45
-50
-55
-60
-10 -5 0 5 10 15 20 25 30
Pout (dBm)
Figure 8. ACLR1 vs Pout
5
5 Page 
PCB Design Guidelines
The recommended ACPM-7881
PCB land pattern is shown in
Figure 16. The substrate is
coated with solder mask
between the I/O and
conductive paddle to protect
the gold pads from short
circuit that is caused by solder
bleeding / bridging.
2.1
0.375
Stencil Design Guidelines
A properly designed solder
screen or stencil is required to
ensure optimum amount of
solder paste is deposited onto
the PCB pads. The
recommended stencil layout is
shown in Figure 17. The
stencil has a solder paste
deposition opening that is
approximately 80% of the PCB
pad. Reducing the stencil
opening can potentially
generate more voids. On the
other hand, stencil openings
larger than 100% will lead to
excessive solder paste smear
or bridging across the I/O pads
or conductive paddle to
adjacent I/O pads. Considering
the fact that solder paste
thickness will directly affect
the quality of the solder joint,
a good choice is to use laser
cut stencil composed of
0.100mm (4 mils) or 0.127mm
(5 mils) thick stainless steel
which is capable of producing
the required fine stencil
outline. The combined PCB
and stencil layout is shown in
Figure 18.
0.55 0.375
Figure 16. PCB land pattern (dimensions in mm)
1.68 0.64
0.44 0.64
Figure 17. Stencil outline drawing (dimensions in mm)
2.1
1.68 0.55
Stencil
Opening
0.44
Figure 18. Combined PCB and stencil layouts (dimensions in mm)
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet ACPM-7881.PDF ] | |
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