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PDF TDA7421N Data sheet ( Hoja de datos )

Número de pieza TDA7421N
Descripción AM/FM TUNER
Fabricantes STMicroelectronics 
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TDA7421N
AM/FM TUNER FOR CAR RADIO AND HI-FI APPLICATIONS
PRELIMINARY DATA
s HIGH PERFORMANCE FRONT-END IC FOR
AM/FM RECEIVERS
s FULLY INTEGRATED HIGH-SPEED PLL FOR
OPTIMIZED RDS APPLICATIONS
s FM MPX/AM AUDIO OUTPUT, 450kHz AM IF
OUTPUT FOR STEREO AM APPLICATIONS
s AM DOUBLE CONVERSION ARCHITECTURE
s AM/FM STATION DETECTOR AND DIGITAL
IF-COUNTER
s SINGLE FREQUENCY REFERENCE FOR
BOTH AM AND FM
s FULL ELECTRICAL ADJUSTMENT
s I2C-BUS PROGRAMMABLE
DESCRIPTION
The TDA7421N is a high-performance tuner circuit
which integrates AM and FM sections, PLL frequency
sinthesizer and IF counter on a single chip.
Use of BICMOS technology allows the implementa-
tion of tuning functions with a minimum of external
components.Value spread of external components
can be fully compensated by means of on-chip elec-
TQFP64
ORDERING NUMBER: TDA7421N
trical adjustment controlled by external µP.
The FM quality detection circuit, in conjunction with
the digital IF counter, enables the stop-station func-
tion in “seek” mode and MPX mute during reception.
The combination of programmable level detector and
IF counter allows reliable AM stop-station perfor-
mance.
The Automatic Gain Control (AGC) operates on dif-
ferent signal bandwidths in order to optimize sensitiv-
ity and dynamic range.
I2C-bus controls functions such as AGC, amplifier
gains, PLL and counter settings.
PIN CONNECTIONS
AM MIX1 IN -
AM MIX1 IN +
FM MIX IN -
FM MIX IN +
FM RF AGC IN
FM AGC OUT
RF GND
VCO B
VCO E
OSC GND
XTAL D
XTAL G
OSC VCC
FM ANT ADJ
FM RF ADJ
PLL VCC
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
1 48
2 47
3 46
4 45
5 44
6 43
7 42
8 41
9 40
10 39
11 38
12 37
13 36
14 35
15 34
16 33
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
FM IF AMP2 OUT
IF1 VCC
FM LIM IN +
FM LIM IN -
IF1 GND
FM BW TC
FM MUTE DRIVE
FM SMETER AM SMETER
FM DET ADJ
FM SD AM SD
AUDIO OUT
FM QUAD+
FM QUAD-
IF2 VCC
AM IF2 IN
AM REF
AM BPF
D98AU909
August 2000
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change with out notice.
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TDA7421N pdf
PIN DESCRIPTION (Continued)
N. Name
Function
49 FM IF AMP2 IN - FM 2nd IF amplifier negative input (differential -)
50 FM IF AMP2 IN + FM 2nd IF amplifier positive input (differential +)
51 FM IF AMP1 OUT FM 1st IF amplifier output
52 FM IF AMP IN - FM 1st IF amplifier negative input (differential -)
53 FM IF AMP IN + FM 1st IF amplifier positive input (differential +)
54 AM S-METER TC AM S-meter time constant
55 AM MIX2 OUT AM 2nd mixer output
56
RF VCC
RF positive supply
57 AM MIX2 IN - AM 2nd mixer negative input (differential -)
58 AM MIX2 IN + AM 2nd mixer positive input (differential +)
59 FM IF AGC IN FM IF AGC input
60
MIX OUT -
FM/AM 1st mixer negative output (differential -)
61
MIX OUT +
FM/AM 1st mixer positive output (differential +)
62
AM AGC1 TC
AM 1st AGC time constant
63 AM AGC1 RF AMP AM 1st AGC voltage output (to RF amplifier)
64 AM AGC1 PIN AM 1st AGC current output (to antenna attenuation diodes)
(*) Pin function is user defined by software.
TDA7421N
5/38

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TDA7421N arduino
TDA7421N
ELECTRICAL CHARACTERISTICS(Continued)
Symbol
Parameter
Test Condition
FSDMAX Field Strength Detector
Maximum Threshold
VFMLIMIN level at which
VMUTE,DRIVE = VMUTE, FSM3-0
set to 1111
Detuning Detector
Ref: FM Test Circuit; HDDIS and SMDIS set to 1, measure:
- Input at VFMLIMIN, CW
- output at VMUTE,DRIVE
DDSTART Detuning Detector Starting Point frequency shift from 10.7MHz at
which VMUTE,DRIVE = VPLAY
DDSLOPE,MIN Detuning Detector Minimum
Muting Slope
frequency shift from 10.7MHz +
DDSTART at which
VMUTE,DRIVE = VMUTE,
BWM2-0 set to 100, SEEK set to 0
DDSLOPE,MAX Detuning Detector Maximum
Muting Slope
frequency shift from 10.7MHz +
DDSTART at which
VMUTE,DRIVE = VMUTE,
BWM2-0 set to 001, SEEK set to 0
DDTRC Detuning Detector Time
Constant Ratio
ratio of ”reception” mode
integration time constant inside
the Detuning Detector with
respect to ”seek” mode
Adjacent Channel Detector
Ref: FM Test Circuit; BWDIS and SMDIS set to 1, measure:
- Input at VFMLIMIN: desired 10.7MHz, 95dBµV CW; undesired 10.8MHz CW
- output at VMUTE,DRIVE
ACDMAX
Adjacent Channel Quality
Detector Maximum Sensitivity
Threshold
amplitude of undesired signal at
which VMUTE,DRIVE = VMUTE,
HDM4-0 set to 11111
ACDMIN
Adjacent Channel Quality
Detector Minimum Sensitivity
Threshold
amplitude of undesired signal at
which VMUTE,DRIVE = VPLAY,
HDM4-0 set to 00000
Field Strength Station Detector
Ref: FM Test Circuit; SEEK set to 1, HDDIS and BWDIS set to 1, measure:
- Input at VFMLIMIN: desired 10.7MHz, CW
- output at VFMSD
FSSDMIN
Field Strength Station Detector
Minimum Threshold
VFMLIMIN level at which
VFMSD = 2.5V;
FSS4-0 set to 00000
FSSDMAX Field Strength Station Detector
Maximum Threshold
VFMLIMIN level at which
VFMSD = 2.5V;
FSS4-0 set to 11111
Min .
Typ.
67.5
±23
30
10
34/6
91
94.8
Max.
Unit
dBµV
KHz
KHz
KHz
s/s
dBu
dBu
dBµV
dBµV
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