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PDF THV3056 Data sheet ( Hoja de datos )
| Número de pieza | THV3056 | |
| Descripción | 3ch Buck/Boost 2ch CP 1ch HVLDO 1ch LVLDO Controller | |
| Fabricantes | THine Electronics | |
| Logotipo |  |
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THV3056_Rev.2.00_E
THV3056
3ch Buck/Boost 2ch CP 1ch HVLDO 1ch LVLDO Controller
Description
THV3056 is a 3ch Buck/Boost Controller IC which enables
to design simple & low cost multi-channel power supply
system.
Ch-1(fixed Boost), ch-2 and ch-3(fixed Buck) are PWM
controllers. As to ch-2, the output of 1.2V is available
because the reference voltage of ch-2 is 0.85V.
VGH and VGL are selectable Positive/Negative charge
pumps and PFM controller.
Built-in high voltage LDO and Vcom buffer amplifier
facilitate to design various power supply systems for large
scale TFT panels.
THV3056 achieves easy phase compensation even with a
ceramic capacitor for the output.
SS_1/2/3, SS_SW, DTC1/2/3, DTC_VGH/DTC_VGL and
SCP help to design user defined soft start time, dead time
and timer latch delay time. Two types of startup sequence
are selectable by controlling SEL1 pin.
THV3056 is suitable for power supply system of TFT LCD
bias and system board with multi -channel power supply.
Features
• QFN 64 pin package
• Input Voltage range : 4.2~ 15V
• Push Pull output for direct Power MOS driving
• Ceramic Capacitors are available for output
• Complete PWM mode controller
• Positive/Negative charge pumps (selectable PFM mode)
• Adjustable switching frequency up to 1MHz
• Timer Latch Protection
• System UVLO function
• Adjustable Soft Start time
• Adjustable Timer Latch Delay time
• Adjustable Dead Time Control
• Thermal Shutdown
• Ch-1, Boost converter
• Ch-2, Synchronous Buck converter
• Ch-3, Boost/Buck/Inverting converter
• High voltage LDO
• LDO of 3.3V
• Vcom Buffer Amplifier
Applications
• TFT-LCD Bias power supply
Pin Assignment
OUT1
PGND1
VO_1SW
SEL1
SEL2
VREG5IN
VREG5
SYUVLO
SCP
FB1
INV1
FB2
INV2
FB3
INV3
RT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
QFN 64PIN
Exposed Pad
(TOP VIEW)
65GNDEXP
48 NON_VGL
47 VGL_UVP
46 INV_VGH
45 VCIN
44 VCFB
43 GNDVC
42 VCOUT
41 V_VC
40 PGND2
39 OUT_L2
38 LL2
37 OUT_H2
36 BST2
35 V_LLDO
34 SS_LLDO
33 OUT_LLDO
Copyright©2010 THine Electronics, Inc.
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THine Electronics, Inc.
1 page  
THV3056_Rev.2.00_E
Pin#
62
64
16
21
29
45
43
44
42
9
31
28
32
2
40
54
59
56
Symbol
V_OUT3
XTEST
RT
SGND1
SGND2
VCIN
GNDVC
VCFB
VCOUT
SCP
PG2
PG3
PUP_PG
PGND1
PGND2
PGND_CP
PGND3
OUT_VGL
Function
Description
Output power supply for
OUT3
Output power supply for OUT3.
Test mode select
Connect to VCC in normal operation.
Timing resistor for oscilla- Resistor connection pin to set oscillation frequency.
tor See Functional Description “Oscillation Circuit” for detail.
Signal GND
GND for control circuit.
Vcom buffer amplifier
non-inverting input
Vcom buffer amplifier non-inverting input.
Power GND for Vcom
buffer amplifier
Power GND for Vcom buffer amplifier.
Vcom buffer amplifier
inverting input
Vcom buffer amplifier inverting input.
Vcom buffer amplifier
output
Vcom buffer amplifier output.
Connecting external bipolar transistor, it can accept high output current.
Timer Latch short circuit Setting the delay time of SCP timer latch circuit. The delay time means
protection
the period from detection of abnormal operations, to shut down of IC.
See Functional Description “Short Circuit Protection” for detail.
Power good output
Open drain output. Connect an approximately 100k ohm pull-up resis-
tor. During soft start, when the voltage of SS pin rise up to the predeter-
mined voltage(ch-2/1V, ch-3/1.35V), PG pin output goes High level.
When soft start has finished normally, the output is fixed to High level.
Do not connect the pull-up resistor to higher voltage than VREG5.
Power good resistor
connection pin
Connecting PG pins with external control pins and also shorting VCC
pin and VREG5 pin, the resistor connected to PG pin should be pulled
up to PUP_PG pin.
Power GND
GND for power circuit.
VGL
(charge pump -)output
VGL drive output for negative voltage charge pump. V_VGL is used as
input power supply. In PFM mode, this pin can be used as PMOS gate
drive.
Copyright©2010 THine Electronics, Inc.
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THine Electronics, Inc.
5 Page 
THV3056_Rev.2.00_E
Parameters
Symbol
Condition
Min Typ Max Unit
Switch Control Block
Output voltage for load switch
Vo(vo_1in)
Vss_sw = 1.2V, V_VGL = 18V
15 V
Output resistance for VO_1SW Ro(vo_1sw) Io = 1mA, SS_SW = 2.5V
1.2 k Ω
Power Good Block
Output resistance
Ropg
PG = Low
Io = 1mA
0.9 1.6 k Ω
PUP_PG output resistance
Rpup_pg
Io = -1mA
0.4 k Ω
SS2 threshold voltage
Vpgss2
1V
SS3 threshold voltage
Vpgss3
1.35 V
INV_VGH, INV_HLDO
threshold voltage
Vpg_vgh,hldo
1.02 V
NON_VGL threshold voltage
Vpg_vgl
0.18 V
OUT_LLDO threshold voltage
Vpg_lldo
OUT_LLDO pin
2.64 V
VGL_UVP Block
VGL_UVP threshold voltage
Vuvp_vgl
0.6 V
VGL_UVP pin input resistance Ri(vgl_uvp)
500 k Ω
Output Block
OUT1 H level output resistance Roh(ch-1)
Ioh = -50mA
17 Ω
OUT1 L level output resistance Rol(ch-1)
OUT_H2 H level output resistance Roh(ch-2h)
Iol = 50mA
Ioh = -50mA
11 Ω
17 Ω
OUT_H2 L level output resistance Rol(ch-2h)
Iol = 50mA
13 Ω
OUT_L2 H level output resistance Roh(ch-2l)
Ioh = -50mA
17 Ω
OUT_L2 L level output resistance Rol(ch-2l)
Iol = 50mA
6Ω
OUT3 H level output resistance Roh(ch-3)
Ioh = -50mA
13 Ω
OUT3 L level output resistance Rol(ch-3)
OUT_VGH H level output resistance Roh(vgh)
Iol = 50mA
V_VGH = 15V, Ioh = -50mA
7Ω
10 Ω
OUT_VGH L level output resistance Rol(vgh)
OUT_VGL H level output resistance Roh(vgl)
OUT_VGL L level output resistance Rol(vgl)
TCON_XRST H level output
resistance
Roh(xrst)
V_VGH = 15V, Iol = 50mA
V_VGL = 15V, Ioh = -50mA
V_VGL = 15V, Iol = 50mA
OUT_LLDO = 3.3V, Iol = -50mA
9
26
16
14
Ω
Ω
Ω
Ω
TCON_XRST L level output
resistance
Rol(xrst)
OUT_LLDO = 3.3V, Iol = 50mA
24
Ω
Copyright©2010 THine Electronics, Inc.
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THine Electronics, Inc.
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet THV3056.PDF ] | |
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