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PDF UBA20262 Data sheet ( Hoja de datos )

Número de pieza UBA20262
Descripción 600V and 350V power IC
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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No Preview Available ! UBA20262 Hoja de datos, Descripción, Manual

UBA20261/2
600 V and 350 V power IC for step dimmable CFLs
Rev. 2 — 10 October 2011
Product data sheet
1. General description
The UBA20261/2 are high-voltage power integrated circuits designed to drive and control
high powered self-ballasted Compact Fluorescent Lamp (CFL) lighting applications
operating at mains supply voltages of 120 V or 230 V. The IC includes a half-bridge power
circuit consisting of two NMOST power MOSFETs, an advanced feature for step dimming
and a lamp current controlled boost feature for boosting cold (amalgam) CFLs.
The controller contains a CFL half-bridge drive function, a high-voltage level-shift circuit
with integrated bootstrap diode, an oscillator function, a current control function for
preheat and burn, a timer function and protection circuits. The UBA20261/2 are supplied
using the dV/dt current charge supply circuit from the half-bridge circuit.
Remark: The mains voltages given in this data sheet are AC voltages.
2. Features and benefits
2.1 Half-bridge features
UBA20261: two internal 350 V, 1 , maximum 5 A NMOST half-bridge power
MOSFETs
UBA20262: two internal 600 V, 3 , maximum 2.7 A NMOST half-bridge power
MOSFETs
Integrated high-voltage level-shifter function with integrated bootstrap diode
2.2 Preheat and ignition features
Coil saturation protection during ignition
Adjustable saturation protection level
Adjustable preheat time
Adjustable preheat current
Ignition lamp current detection
2.3 Lamp boost features
Adjustable boost timing
Fixed boost current ratio of 1.5
Gradually boost to burn transition timing

1 page




UBA20262 pdf
NXP Semiconductors
UBA20261/2
600 V and 350 V power IC for step dimmable CFLs
7. Functional description
The UBA20261/2 are ICs with integrated half-bridge MOSFETs in self-ballasted
high-power CFLs. The UBA20261/2 have no dimming control input but instead, four
preset fixed dimming levels. Only minor adjustment of the presets is possible.
The UBA20261/2 are rated up to a maximum continuous rectified mains voltage of 350 V
or 500 V, respectively and lamp power-up to 20 W. The UBA20261/2 includes all functions
necessary for preheat, ignition and boost operation of the lamp. In addition, the IC
includes the four-step dimming feature and several protective features to safeguard CFL
operation. The controller states are shown in Figure 3.
VDD = 0
RESET STATE
HOLD = 0
VDD < VDD(rst)
VDD > VDD(rst)
VDD < VDD(rst)
START-UP STATE
VCP < Vth(rel)CP
(1)
POWER-DOWN STATE
PREHEAT STATE
VDD < VDD(stop)
preheat time
completed
IGNITION STATE
Ignition_Detected
BOOST AND BURN
STATES
(2)
(3)
HOLD STATE
HOLD = 1
(4)
(5)
(1) VDD < VDD(start) and (HOLD = 0 OR VCP < Vth(rel)CP).
(2) VDD < VDD(stop).
(3) (End of ignition time AND HOLD = 0) OR VDD < VDD(stop).
(4) End of ignition time AND HOLD = 1.
(5) VCP < Vth(pd)CP, OR overcurrent fault time > 110 tph OR fbridge(max) detected in capacitive mode.
Fig 3. State diagram
001aam763
UBA20261_UBA20262
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 10 October 2011
© NXP B.V. 2011. All rights reserved.
5 of 32

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UBA20262 arduino
NXP Semiconductors
UBA20261/2
600 V and 350 V power IC for step dimmable CFLs
the supply voltage VDD rises between VDD(stop) and VDD(start). Typically, the supply current
is 2 mA when VDD falls between VDD(start) and VDD(stop). More current is drawn during the
fall in VDD because the internal analog supply is turned on when VDD > VDD(start). This
function enables the comparators to monitor the voltage on the CP pin and if the supply
voltage VDD falls below VDD(stop).
7.2 Oscillation and timing
7.2.1 Oscillator control
The internal oscillator is a VCO which generates a saw-tooth waveform between the
Vth(CF)max level and 0 V. Capacitor CCF, resistor Rext(RREF) and the voltage on the CI pin
determine the saw-tooth frequency. Rext(RREF) and CCF determine the minimum and
maximum switching frequencies. Their ratio is internally fixed. Two ratios are available,
the ratio between fbridge(max) and fbridge(min) is 2.5 and the ratio between fbridge(max) and
fbridge(bst)min is 4.6. The saw-tooth frequency is twice the half-bridge frequency.
Transistors HS (Q1) and LS (Q2) are switched to conducting at a duty cycle of
approximately 50 %. An overview of the oscillator signal and driver signals is shown in
Figure 8. The oscillator starts oscillating at fbridge(max). The non-overlap time between the
gate driver signals VGLS and VGHS is tno.
voltage
(V)
VCF
0
V(GHS-HBO)
0
VGLS
0
tdch
tno tno
VHBO
0
Fig 8. Saw-tooth, gate driver and half-bridge output signals
time (s)
001aam766
7.2.2 Combined timing circuit
A combined timing circuit is used to determine the preheat time, ignition enabling time and
overcurrent time (see Figure 9). CCP, Rext(RREF) and the counter comprise the clock
generator circuit. When the timer is not running, CCP is charged to 5 V. The timing circuit
UBA20261_UBA20262
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 10 October 2011
© NXP B.V. 2011. All rights reserved.
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