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PDF EM78P153E Data sheet ( Hoja de datos )

Número de pieza EM78P153E
Descripción 8-bit microprocessor
Fabricantes ELAN Microelectronics 
Logotipo ELAN Microelectronics Logotipo



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EM78P153E
OTP ROM
1. GENERAL DESCRIPTION
EM78P153E is an 8-bit microprocessor with low-power and high-speed CMOS technology. It is equipped
with a 512*13-bits Electrical One Time Programmable Read Only Memory (OTP-ROM). It provides a
PROTECTION bit to prevent intrusion of user’s code in the OTP memory as well as 15 OPTION bits to
match user’s requirements.
With its OTP-ROM feature, the EM78P153E offers users a convenient way of developing and verifying
their programs. Moreover, user developed code can be easily programmed with the EMC writer.
This specification is subject to change without prior notice.
1
2002/03/01

1 page




EM78P153E pdf
EM78P153E
OTP ROM
* Wake up from sleep mode when the status of the pin changes.
* Schmitt Trigger input during the programming mode.
* External interrupt pin triggered by falling edge.
* General purpose I/O pin.
P66, P67 2, 3 I/O * Pull-high/open-drain.
* Wake up from sleep mode when the status of the pin changes.
P50~P52
1,14,13
I/O
* General purpose I/O pin.
* Pull-down
P53 12 I/O * General purpose I/O pin.
VSS 11 - * Ground.
This specification is subject to change without prior notice.
5
2002/03/01

5 Page





EM78P153E arduino
EM78P153E
OTP ROM
1: enabled by ENI/RETI instructions
Bit 7 Not used.
• CONT register is both readable and writable.
3. IOC5 ~ IOC6 (I/O Port Control Register)
• "1" put the relative I/O pin into high impedance, while "0" defines the relative I/O pin as output.
• Only the lower 4 bits of IOC5 are available to be defined.
• IOC5 and IOC6 registers are both readable and writable.
4. IOCB (Pull-down Control Register)
765432
-
/PD6
/PD5
/PD4
-
/PD2
Bit 0 (/PD0) Control bit is used to enable the pull-down of P50 pin.
0: Enable internal pull-down
1: Disable internal pull-down
Bit 1 (/PD1) Control bit is used to enable the pull-down of P51 pin.
Bit 2 (/PD2) Control bit is used to enable the pull-down of P52 pin.
Bit 3 Not used.
Bit 4 (/PD4) Control bit is used to enable the pull-down of P60 pin.
Bit 5 (/PD5) Control bit is used to enable the pull-down of P61 pin.
Bit 6 (/PD6) Control bit is used to enable the pull-down of P62 pin.
• Bit 7 Not used.
• IOCB Register is both readable and writable.
1
/PD1
0
/PD0
5. IOCC (Open-drain Control Register)
76543210
OD7 OD6 OD5 OD4 - OD2 OD1 OD0
Bit 0 (OD0) Control bit is used to enable the open-drain of P60 pin.
0: Disable open-drain output
1: Enable open-drain output
Bit 1 (OD1) Control bit is used to enable the open-drain of P61 pin.
Bit 2 (OD2) Control bit is used to enable the open-drain of P62 pin.
Bit 3 Not used.
Bit 4 (OD4) Control bit is used to enable the open-drain of P64 pin.
Bit 5 (OD5) Control bit is used to enable the open-drain of P65 pin.
Bit 6 (OD6) Control bit is used to enable the open-drain of P66 pin.
Bit 7 (OD7) Control bit is used to enable the open-drain of P67 pin.
This specification is subject to change without prior notice.
11
2002/03/01

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