|
|
PDF NOII4SM6600A Data sheet ( Hoja de datos )
| Número de pieza | NOII4SM6600A | |
| Descripción | 6.6 Megapixel CMOS Image Sensor | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de NOII4SM6600A (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
NOII4SM6600A
6.6 Megapixel CMOS Image
Sensor
Features
• 2210 (H) x 3002 (V) Active Pixels
• 3.5 mm x 3.5 mm Square Pixels
• 1 inch Optical Format
• Monochrome Output
• Frame Rate:
♦ 5 fps for Active Window of 2210 x 3002
♦ 89 fps for Active Window of 640 x 480
• High Dynamic Range Modes: Double Slope, Non Destructive
Read out (NDR)
• Electronic Rolling Shutter
• Master Clock: 40 MHz
• Single 2.5 V Supply
• 3.3 V Supply for Extended Dynamic Range
• −30°C to +65°C Operational Temperature Range
• 68-Pin LCC Package
• Power Dissipation: 225 mW
• These Devices are Pb−Free and are RoHS Compliant
http://onsemi.com
Applications
• Machine Vision
• Biometry
• Document Scanning
Figure 1. IBIS4−6600 Image Sensor
Description
The IBIS4-6600 is a solid-state CMOS image sensor that integrates complete analog image acquisition, and a digitizer and
digital signal processing system on a single chip. This image sensor has a resolution of 6.6 MPixel with 2210 x 3002 active
pixels. The image size is fully programmable for user-defined windows. The pixels are on a 3.5 mm pitch.
The user programmable row and column start and stop positions enable windowing down to 2x1 pixel window for digital
zoom. Subsampling reduces resolution while maintaining the constant field of view. The analog video output of the pixel
array is processed by an on-chip analog signal pipeline. Double Sampling (DS) eliminates the fixed pattern noise.
The programmable gain and offset amplifier maps the signal swing to the ADC input range. A 10-bit ADC converts the
analog data to a 10-bit digital word stream. The sensor uses a three-wire Serial-Parallel (SPI) interface. It operates with a
single 2.5 V power supply and requires only one master clock for operation up to 40 MHz. It is housed in a 68-pin ceramic
LCC package.
This data sheet enables the development of a camera system, based on the described timing and interfacing given in the
following sections.
ORDERING INFORMATION
Marketing Part Number
NOII4SM6600A-QDC
Description
Mono with Glass
NOTE: For more information, see Ordering Code Definition on page 29.
Package
68 pin LCC
© Semiconductor Components Industries, LLC, 2013
February, 2013 − Rev. 14
1
Publication Order Number:
NOII4SM6600A/D
1 page  
Electro Voltaic Response Curve
0.7
NOII4SM6600A
0.6
0.5
0.4
0.3
0.2
0.1
0
0
5000
10000
15000
20000
25000
# electrons
Figure 3. Electro Voltaic Response Curve
Figure 3 shows the pixel response curve in linear response
mode. This curve is the relation between the electrons
detected in the pixel and the output signal. The resulting
voltage-electron curve is independent of any parameters, for
example, integration time. The voltage to electrons
conversion gain is 43 mV/electron.
Table 1. FEATURES AND GENERAL SPECIFICATIONS
Feature
Specification/Description
Electronic shutter type
Rolling shutter
Integration time control
Windowing (ROI)
60 ms - 1/frame period
Randomly programmable ROI read out
Sub Sampling Modes
Several sub sample modes can be programmed (refer Table 8 on page 12)
Extended Dynamic Range
Dual slope (up to 90 dB optical dynamic range) and nondestructive read out mode
Analog Output
The output rate of 40 Mpixels/s can be achieved with two analog outputs, each working at
20 Mpixel/s
Digital Output
Two on-chip 10-bit ADCs at 20 Msamples/s are multiplexed to one digital 10-bit output at
40 Msamples/s
Supply Voltage VDD
Logic Levels
Nominal 2.5 V (some supplies require 3.3 V for extended dynamic range)
2.5 V
Interface
Serial Peripheral Interface (SPI)
Package
68-pin LCC
http://onsemi.com
5
5 Page 
NOII4SM6600A
Analog to Digital Converter
The IBIS4-6600 has a two 10-bit flash analog digital
converters. The ADCs are electrically separated from the
image sensor. The inputs of the ADC must be tied externally
to the outputs of the output amplifiers. One ADC samples
the even columns and the second ADC samples the odd
columns. Alternatively, one ADC can also sample all the
pixels.
The sensor’s outputs are not designed to drive large loads.
Therefore, to drive a cable or long PCB trace, the outputs of
the sensor should be buffered.
Table 6. ADC SPECIFICATIONS
Parameter
Specification
Input Range
Set by External Resistors
(Refer the section The internal resist-
ance has a value of approximately
577 W. Only 277 W of this internal
resistance is actually used as reference
for internal ADC.)
Quantization
10 Bits
Nominal Data Rate 20 Msamples/s
DNL
Typical: 1.5 LSB10
INL Typical: 5 LSB10
Input Capacitance
< 2 pF
Conversion Law
Linear/Gamma corrected
The internal resistance has a value of approximately
577 W. Only 277 W of this internal resistance is actually used
as reference for the internal ADC.
Black Calibration
Due to slight variations in the chip fabrication process, the
output analog voltage of the PGA is not perfectly matched
to the input analog range of the ADC. As a result, a reduced
dynamic range is obtained when comparing
sensors/cameras from different lots. This is especially true
in the dark as it is possible that a part of the analog range gets
clipped when it reaches the ADC.
For this reason, black calibration step is required. Because
this is a fixed setting, and varies very slightly with
temperature, the setting can be done at the factory itself.
While grabbing normal images, the settings can be loaded
from an on-board memory.
In the IBIS4-6600 image sensor, black calibration step
also tries to match the output of the odd and even channels.
The steps for black calibration are -
1. Put the sensor in dark.
2. Change DAC_RAW such that no pixel or least
number of pixels (assuming there are defect
pixels) have a zero ADC output value.
3. Change DAC_FINE such that the average of the
odd columns is almost same as the even columns.
4. Change DAC_RAW again such that all pixels have
a non-zero output, but are as close to zero as
possible.
5. Record the DAC_RAW and DAC_FINE values.
6. Load the recorded DAC register values during
operation.
Serial to Parallel Interface (SPI)
To upload the sequencer registers, a dedicated serial to
parallel interface (SPI) is implemented. 16 bits (4 address
bits + 12 data bits) must be uploaded serially. The address
must be uploaded first (MSB first), then the data (also MSB
first).
The elementary unit cell is shown in Figure 9. Sixteen of
these cells are connected in series, having a common
SPI_CLK form the entire uploadable parameter block. Dout
of one cell is connected to SPI_DATA of the next cell
(maximum speed is 20 MHz). The uploaded settings on the
address/data bus are loaded into the correct register of the
sensor on the rising edge of signal REG_CLOCK and
become effective immediately.
16 outputs to address/data bus
REG_CLOCK
SPI_DATA
SPI_CLK
DQ
SPI_DATA
SPI_CLK
C
To address/data bus
REG_CLOCK
DQ
Dout
C SPI_CLK
Entire uploadable address block
Unity C ell
SPI_DATA
A3 A2
REG_CLOCK
Figure 9. SPI Interface
A1
D0
Internal register
upload
http://onsemi.com
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet NOII4SM6600A.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| NOII4SM6600A | 6.6 Megapixel CMOS Image Sensor | ON Semiconductor |
| NOII4SM6600A-QDC | 6.6 Megapixel CMOS Image Sensor | ON Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |